EPM9320LI84-20 Datasheet, PDF (8/46 Pages) Altera Corporation – Programmable Logic Device Family

MAX 9000 Programmable Logic Device Family Data Sheet
Macrocells
The MAX 9000 macrocell consists of three functional blocks: the product
terms, the product-term select matrix, and the programmable register.
The macrocell can be individually configured for both sequential and
combinatorial logic operation. See Figure 3.
Figure 3. MAX 9000 Macrocell & Local Array
33 Row
FastTrack
Interconnect
Inputs
LAB Local
Array
Parallel
Expanders
(from Other
Macrocells)
Global Global
Clear Clocks
2
Macrocell Register
Input Select Bypass
Programmable
Register
Product-
Term
Select
Matrix
16 Local
Feedbacks
16 Shareable
Expander Product
Clock/
Enable
Select
VCC
Clear
Select
PRN
D/T Q
ENA
CLRN
To Row or
Column
FastTrack
Interconnect
Local Array
Feedback
Combinatorial logic is implemented in the local array, which provides five
product terms per macrocell. The product-term select matrix allocates
these product terms for use as either primary logic inputs (to the OR and
XOR gates) to implement combinatorial functions, or as secondary inputs
to the macrocell’s register clear, preset, clock, and clock enable control
functions. Two kinds of expander product terms (“expanders”) are
available to supplement macrocell logic resources:
■ Shareable expanders, which are inverted product terms that are fed
back into the logic array
■ Parallel expanders, which are product terms borrowed from adjacent
macrocells
The MAX+PLUS II software automatically optimizes product-term
allocation according to the logic requirements of the design.
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Altera Corporation