|
EPM9320LI84-20 Datasheet, PDF (21/46 Pages) Altera Corporation – Programmable Logic Device Family | |||
|
◁ |
MAX 9000 Programmable Logic Device Family Data Sheet
By combining the pulse and shift times for each of the programming
stages, the program or verify time can be derived as a function of the TCK
frequency, the number of devices, and specific target device(s). Because
different ISP-capable devices have a different number of EEPROM cells,
both the total fixed and total variable times are unique for a single device.
Programming a Single MAX 9000 Device
The time required to program a single MAX 9000 device in-system can be
calculated from the following formula:
tPR OG = tPP ULSE + -C----y---c-f--Tl---e--CP----KT----C-----K--
where: tPROG
tPPULSE
CyclePTCK
fTCK
= Programming time
= Sum of the fixed times to erase, program, and
verify the EEPROM cells
= Number of TCK cycles to program a device
= TCK frequency
The ISP times for a stand-alone verification of a single MAX 9000 device
can be calculated from the following formula:
tVER = tVPULSE + C-----y---c--f-l-T-e---CV----K-T----C----K---
where: tVER
= Verify time
tVPULSE = Sum of the fixed times to verify the EEPROM cells
CycleVTCK = Number of TCK cycles to verify a device
Altera Corporation
21
|
▷ |