EP2AGX125EF29I5N Datasheet, PDF (38/78 Pages) Altera Corporation – Device Datasheet for Arria II Devices

1–38
Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
Table 1–40. Transceiver Block Jitter Specifications for Arria II GX Devices (Note 1) (Part 2 of 10)
Symbol/
Description
Conditions
I3
C4
C5, I5
C6
Unit
Min Typ Max Min Typ Max Min Typ Max Min Typ Max
Jitter frequency =
0.06 KHz
> 15
> 15
> 15
> 15
UI
Pattern = PRBS15
Jitter tolerance at
2488.32 Mbps
Jitter frequency =
100 KHZ
Pattern = PRBS15
Jitter frequency =
1 MHz
Pattern = PRBS15
> 1.5
> 0.15
> 1.5
> 0.15
> 1.5
> 0.15
> 1.5
UI
> 0.15
UI
Jitter frequency =
10 MHz
Pattern = PRBS15
> 0.15
> 0.15
> 0.15
> 0.15
UI
XAUI Transmit Jitter Generation (3)
Total jitter at
3.125 Gbps
Pattern = CJPAT —
Deterministic
jitter at
3.125 Gbps
Pattern = CJPAT —
— 0.3 — — 0.3 — — 0.3 — — 0.3 UI
— 0.17 — — 0.17 — — 0.17 — — 0.17 UI
XAUI Receiver Jitter Tolerance (3)
Total jitter
—
Deterministic
jitter
—
Peak-to-peak
jitter
Jitter frequency =
22.1 KHz
Peak-to-peak
jitter
Jitter frequency =
1.875 MHz
Peak-to-peak
jitter
Jitter frequency =
20 MHz
> 0.65
> 0.37
> 8.5
> 0.1
> 0.1
> 0.65
> 0.37
> 8.5
> 0.1
> 0.1
> 0.65
> 0.37
> 8.5
> 0.1
> 0.1
> 0.65
UI
> 0.37
UI
> 8.5
UI
> 0.1
UI
> 0.1
UI
PCIe Transmit Jitter Generation (4)
Total jitter at
2.5 Gbps (Gen1)
Compliance
pattern
— — 0.25 — — 0.25 — — 0.25 — — 0.25 UI
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
July 2012 Altera Corporation