MT47H64M8B6-25ELDTR Datasheet, PDF (34/133 Pages) Micron Technology – 512Mb: x4, x8, x16 DDR2 SDRAM

Table 12: AC Operating Specifications and Conditions (Continued)
Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table;
V_DDQ = 1.8V ±0.1V, V_DD = 1.8V ±0.1V
AC Characteristics
-187E
-25E
-25
-3E
-3
-37E
-5E
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Min Max Min Max Units Notes
DQ output access
t_{AC –350 350 –400 400 –400 400 –450 450 –450 450 –500 500 –600 600 ps}
19
time from CK/CK#
DQS–DQ skew,
t_DQSQ
–
175
– 200 – 200 – 240 – 240 – 300 – 350 ps 26, 27
DQS to last DQ
valid, per group,
per access
DQ hold from next ^tQHS
DQS strobe
–
250
– 300 – 300 – 340 – 340 – 400 – 450 ps
28
DQ–DQS hold, DQS ^tQH
to first DQ not val-
id
MIN = ^tHP - ^tQHS
MAX = n/a
ps 26, 27,
28
CK/CK# to DQ, DQS ^tHZ
High-Z
MIN = n/a
MAX = ^tAC (MAX)
ps 19, 21,
29
CK/CK# to DQ
t_LZ2
Low-Z
MIN = 2 × ^tAC (MIN)
MAX = ^tAC (MAX)
ps 19, 21,
22
Data valid output
window
DVW
MIN = ^tQH - ^tDQSQ
MAX = n/a
ns 26, 27
DQ and DM input ^tDSb
0
setup time to DQS
–
50 – 50 – 100 – 100 – 100 – 150 – ps 26, 30,
31
DQ and DM input ^tDHb
75
hold time to DQS
– 125 – 125 – 175 – 175 – 225 – 275 – ps 26, 30,
31
DQ and DM input
t_DSa
200
–
250 – 250 – 300 – 300 – 350 – 400 –
ps 26, 30,
setup time to DQS
31
DQ and DM input ^tDHa 200
–
250 – 250 – 300 – 300 – 350 – 400 –
ps 26, 30,
hold time to DQS
31
DQ and DM input
pulse width
t_DIPW
MIN = 0.35 × ^tCK
MAX = n/a
t_{CK 18, 32}