EP2AGX260FF35I3N Datasheet, PDF (25/78 Pages) Altera Corporation – Device Datasheet for Arria II Devices

Table 1–34. Transceiver Specifications for Arria II GX Devices (Note 1) (Part 5 of 7)
Symbol/
Description
Condition
Min
LTD lock time
(11)
—
0
Data lock time
from rx_
—
—
freqlocked
(12)
DC Gain
Setting = 0
—
Programmable DC Gain
DC gain
Setting = 1
—
DC Gain
Setting = 2
—
I3
C4
C5 and I5
Typ
Max Min Typ
Max
Min
Typ
Max
100
4000
0
100
4000
0
100
4000
—
4000 —
—
4000
—
—
4000
0
—
—
0
—
—
0
—
3
—
—
3
—
—
3
—
6
—
—
6
—
—
6
—
Transmitter
Supported I/O
Standards
Data rate
—
V_OCM
0.65 V
setting
Differential
on-chip
termination
resistors
100
setting
PCIe
Return loss
differential mode _XAUI
Return loss
common mode
Rise time (2)
Fall time
PCIe
—
—
1.5-V PCML
600
—
6375 600 —
3750
600
—
3750
—
650
—
— 650
—
—
650
—
—
100
—
— 100
—
—
100
—
50 MHz to 1.25 GHz: –10dB
312 MHz to 625 MHz: –10dB
625 MHz to 3.125 GHz: –10dB/decade slope
50 MHz to 1.25 GHz: –6dB
50
—
200
50
—
200
50
—
200
50
—
200
50
—
200
50
—
200
C6
Min Typ Max
0 100 4000
— — 4000
—
0
—
—
3
—
—
6
—
600 —
— 650
3125
—
— 100
—
50 —
200
50 —
200
Unit
ns
ns
dB
dB
dB
Mbps
mV

ps
ps