EP2AGX260FF35I3N Datasheet, PDF (23/78 Pages) Altera Corporation – Device Datasheet for Arria II Devices

Table 1–34. Transceiver Specifications for Arria II GX Devices (Note 1) (Part 3 of 7)
Symbol/
Description
Condition
Min
fixedclk clock
frequency
PCIe
Receiver
Detect
—
reconfig_
clk clock
frequency
Dynamic
reconfig.
clock
frequency
2.5/
37.5
(4)
Delta time
between
reconfig_
clks (5)
—
—
Transceiver block
minimum
power-down
—
—
pulse width
I3
C4
C5 and I5
C6
Typ
Max Min Typ
Max
Min
Typ
Max Min Typ Max
125
—
— 125
—
—
125
—
— 125
—
2.5/
2.5/
2.5/
—
50
37.5 —
50
37.5
—
50
37.5 —
50
(4)
(4)
(4)
—
2
—
—
2
—
—
2
——
2
1
—
—
1
—
—
1
—
—
1
—
Receiver
Supported I/O
Standards
Data rate
—
600
Absolute V_MAX
for a receiver pin
—
—
(6)
Absolute V_MIN for
a receiver pin
—
-0.4
Maximum
peak-to-peak
V_ICM = 0.82 V
setting
—
differential input
voltage V_ID (diff
p-p)
V_ICM =1.1 V
setting (7)
—
1.4-V PCML, 1.5-V PCML, 2.5-V PCML, 2.5-V PCML, LVPECL, and LVDS
—
6375 600 —
3750
600
—
3750 600 —
—
1.5
—
—
1.5
—
—
1.5
——
3125
1.5
—
—
-0.4 —
—
-0.4
—
—
-0.4 —
—
—
2.7
—
—
2.7
—
—
2.7
——
2.7
—
1.6
—
—
1.6
—
—
1.6
——
1.6
Unit
MHz
MHz
ms
µs
Mbps
V
V
V
V