AK4631 Datasheet, PDF (66/69 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4631]
„ ΫϩοΫͷఀࢭ

ADC, DAC, ALC1, ALC2, IPGA Λ࢖༻͠ͳ͍৔߹͸ɺϚελΫϩοΫΛఀࢭ͢Δ͜ͱ͕Ͱ͖·͢ɻ
3. PLL ϚελϞʔυͰ࢖༻͢Δ৔߹
PMPLL bit
(Addr:01H,D0)
MCKO bit
(Addr:01H,D1)
MCKPD bit
(Addr:01H,D2)
External MCKI
(1)
(2)
"H" or "L"
(3)
(4)
Input
Example:
Audio I/F Format: DSP Mode, BCKP = MSBS = “0”
BICK frequency at Master Mode : 64fs
Input Master Clock Select at PLL Mode : 11.2896MHz
Sampling Frequency:8kHz
(1) (2) (3) Addr:01H, Data:0CH
Stop an external MCKI
Figure 52. Clock Stopping Sequence (1)
<खॱྫ>
(1) PLLͷύϫʔμ΢ϯ : PMPLL bit = “1” → “0”
(2) MCKOग़ྗͷఀࢭ: MCKO bit = “1” → “0”
(3) MCKI pinͷϓϧμ΢ϯ : MCKPD bit = “0” → “1”
MCKI pin΁ೖྗ͞ΕΔ৴߸͕ Hi-Z ͷͱ͖ɺMCKI pin Λϓϧμ΢ϯͯ͠Լ͍͞ɻ
(4) ֎෦ΫϩοΫΛࢭΊͯԼ͍͞ɻ
4. PLL, εϨʔϒϞʔυ (FCK, BICK pin)ͷ৔߹
PMPLL bit
(Addr:01H,D0)
External BICK
External FCK
(1)
(2)
Input
(2)
Input
Example
Audio I/F Format : DSP Mode, BCKP = MSBS = “0”
PLL Reference clock: BICK
BICK frequency: 64fs
Sampling Frequency: 8kHz
(1) Addr:01H, Data:04H
(2) Stop the external clocks
Figure 53. Clock Stopping Sequence (2)
<खॱྫ>
(1) PLLͷύϫʔμ΢ϯ : PMPLL bit = “1” → “0”
(2) ֎෦ΫϩοΫΛࢭΊͯԼ͍͞ɻ
MS0317-J-01
- 66 -
2004/11