|
AK4631 Datasheet, PDF (48/69 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP | |||
|
◁ |
ASAHI KASEI
[AK4631]
AOPSN: ÏÏϥΠϯà¥à¾(AOUT pin)Í·ÏÏ«ÊηÊÏÏÊÏ
0: Normal Operation (Default)
1: Power Save Mode
â1â Í°ÏÏϥϧϥΠϯà¥à¾ÎϯÏÍ·ÏÏ«ÊηÊÏÏÊÏ
Íà¼Þ®Í´Í³ÎÎ͢ɻÍÍ·à£ÉºPMAO bit Î
੾ÎସÍÎÍͱͰÏÏ«ÊηÊÏÏÊÏ
Îܦà¼Í ͯɺÏÏ«ÊÎοÏÊμ΢ϯà£Í·à©¾ÎସÍà£Í´àµà©
Í¢ÎÏοÏÔ»Î௿͢ݮÎÍͱÍà¥à½Î͢ɻ(See Figure 33)
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
04H Mode Control 1
PLL3 PLL2 PLL1 PLL0 BCKO1 BCKO0 DIF1
DIF0
Default
0
0
0
0
0
0
1
0
DIF1-0: ΦÊÏÎΦΠϯλÏΣÊεÏÎ¥ÊÏÎ¿Ï (See Table 25)
Mode
0
1
2
3
DIF1
0
0
1
1
DIF0
0
1
0
1
SDTO (ADC) SDTI (DAC) BICK
DSP Mode DSP Mode ⥠16fs
લ٧Î
ÞÙ§Î
⥠32fs
લ٧Î
I2S×µÞ
લ٧Î
I2S×µÞ
⥠32fs
⥠32fs
Table 25. Audio Interface Format
Figure
See Table 31
Figure 26
Figure 27
Figure 28
Default
BCKO1-0: ÏελÏÊÏ
à£Í·BICKà¥à¾à¤ªà³¾à¨ºÍ·àªà° (See Table 26)
Mode
0
1
2
3
BCKO1
BCKO0
BICKà¥à¾à¤ªà³¾à¨º
0
0
16fs
0
1
32fs
1
0
64fs
1
1
N/A
Table 26. BICK Output Frequency at Master Mode
Default
PLL3-0: PLLج४ΫϩοΫͷબà(See Table 27)
Mode
0
1
2
3
4
5
6
7
12
13
Others
PLL3
bit
0
0
0
0
0
0
0
0
1
1
PLL2 PLL1 PLL0 PLL Reference
Input
bit
bit
bit Clock Input Pin Frequency
0
0
0
FCK pin
1fs
0
0
1
BICK pin
16fs
0
1
0
BICK pin
32fs
0
1
1
BICK pin
64fs
1
0
0
MCKI pin 11.2896MHz
1
0
1
MCKI pin
12.288MHz
1
1
0
MCKI pin
12MHz
1
1
1
MCKI pin
24MHz
1
0
0
MCKI pin
13.5MHz
1
0
1
MCKI pin
27MHz
Others
N/A
Table 27. Setting of PLL Mode (*fs: Sampling Frequency)
Default
MS0317-J-01
- 48 -
2004/11
|
▷ |