AK4631 Datasheet, PDF (61/69 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4631]
„ ϚΠΫೖྗ࿥Ի

FS3-0 bits
(Addr:05H,
D5,D2-0)
XXXX
(1)
MIC Control
(Addr:02H, D2-0)
ALC1 Control 1
(Addr:06H)
ALC1 Control 2
(Addr:08H)
001
(2)
XXH
(3)
XXH
(4)
ALC1 Control 3
(Addr:07H)
ALC1 State
XXH
(5)
ALC1 Disable
XXX
X1X
00H
47H
Example:
PLL Master Mode
Audio I/F Format:DSP Mode, BCKP=MSBS=“0”
Sampling Frequency:8kHz
Pre MIC AMP:+20dB
MIC Power On
ALC1 setting:Refer to Figrure 29
ALC2 bit=“1”(default)
(1) Addr:05H, Data:00H
(2) Addr:02H, Data:07H
(3) Addr:06H, Data:00H
61H or 21H
ALC1 Enable ALC1 Disable
(4) Addr:08H, Data:47H
(5) Addr:07H, Data:61H
PMADC bit
(Addr:00H, D0)
PMMIC bit
(Addr:00H, D1)
ADC Internal
State
(6)
(7)
1059 / fs
Power Down
Initialize Normal State Power Down
(6) Addr:00H, Data:43H
Recording
(7) Addr:00H, Data:40H
Figure 47. MIC Input Recording Sequence
<खॱྫ>
fs=8kHz࣌ͷALC1ͷઃఆྫͰ͢ɻ΋͠ɺALC1ͷύϥϝʔλΛมߋ͢Δ৔߹͸ɺ “Figure 30. Registers set-up
sequence at ALC1 operation”Λࢀরͯ͠Լ͍͞ɻ
ʮΫϩοΫͷઃఆʯͷ߲Λࢀর͠ɺΫϩοΫΛͯ͠څڙԼ͍͞ɻ
(1) αϯϓϦϯάप೾਺(FS3-0 bit)Λઃఆͯ͠Լ͍͞ɻPLLϞʔυͷ৔߹ɺαϯϓϦϯάप೾਺Λมߋ͔ͯ͠Βͷ
PLLϩοΫ࣌ؒΛߟྀ͠ɺ(6)ͷϚΠΫͼٴADCͷύϫʔΞοϓΛߦͬͯԼ͍͞ɻ
(2) ϚΠΫೖྗ(ΞυϨε 02H)ͷઃఆɻ
(3) ALC1 Timer ʢΞυϨε 06Hʣͷઃఆ
(4) ALC1 REF஋ʢΞυϨε 08Hʣͷઃఆ
(5) LMTH, RATT, LMAT1-0, ALC1 bitͷઃఆʢΞυϨε 07Hʣ
(6) ϚΠΫͼٴADCͷύϫʔΞοϓ : PMMIC bit = PMADC bit = “0” → “1”
ADCͷॳظԽαΠΫϧ͸1059/fs=133ms@fs=8kHzͰ͢ɻ
ALC1 bit ʹ “1”͕ઃఆ͞ΕͨޙɺϚΠΫϒϩοΫ͕ύϫʔΞοϓ͞ΕΔͱɺALC1͸IPGAͷॳظ஋(0dB)͔Β
ಈ࡞Λ։࢝͠·͢ɻ
(7) ϚΠΫͼٴADCͷύϫʔμ΢ϯ : PMMIC bit = PMADC bit = “1” → “0”
ALC1ͷઃఆΛมߋ͠ͳ͍৔߹͸ɺALC1 bit ͸ “1”ͷ··Ͱ΋ߏ͍·ͤΜɻϚΠΫΛύϫʔμ΢ϯ͢Δ͜ͱͰ
ALC1΋Disableঢ়ଶʹͳΓ·͢ɻαϯϓϦϯάप೾਺Λมߋ͠ɺALC1ͷઃఆΛมߋ͢Δ৔߹͸ɺϚχϡΞϧ
Ϟʔυ (ALC1 bit = “0”) ͋Δ͍͸ ϚΠΫϒϩοΫΛύϫʔμ΢ϯʢPMMIC bit = “0”ʣ͔ͯ͠ΒߦͬͯԼ͍͞ɻͨ
ͩ͠ɺPMMIC bit = “0”ͷͱ͖ɺIPGAͷήΠϯ͸Ϧηοτ͞Εɺ࣍ͷύϫʔΞοϓ࣌͸ॳظ஋Ͱಈ࡞Λ։࢝͠·
͢ɻ
MS0317-J-01
- 61 -
2004/11