AK4631 Datasheet, PDF (59/69 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4631]
3. PLL εϨʔϒϞʔυͰ֎෦ΫϩοΫ (MCKI pin) Λ࢖༻͢Δ৔߹
Power Supply
PDN pin
PMVCM bit
(Addr:00H, D6)
MCKPD bit
(Addr:01H, D2)
MCKO bit
(Addr:01H, D1)
PMPLL bit
(Addr:01H, D0)
MCKI pin
MCKO pin
BICK pin
FCK pin
(1)
(2) (3)
(4)
(5)
(6)
Input
40msec(max)
(7)
(8)
(9)
Output
Input
Example:
Audio I/F Format: DSP Mode, BCKP = MSBS = “0”
BICK frequency at Master Mode: 64fs
Input Master Clock Select at PLL Mode: 11.2896MHz
MCKO : Enable
Sampling Frequency:8kHz
(1) Power Supply & PDN pin = “L” Æ “H”
(2)Addr:01H, Data:04H
Addr:04H, Data:48H
Addr:05H, Data:00H
(3)Addr:00H, Data:40H
(4)Addr:01H, Data:03H
MCKO output start
BICK and FCK input start
Figure 45. Clock Set Up Sequence (3)
<खॱྫ>
(1) ޙ্ཱ͛ͪݯిɺPDN pin “L” → “H”
(1)ͷ۠ؒ͸AK4631ͷϦηοτͷͨΊɺ150nsҎ্ͷ “L”͕۠ؒඞཁͰ͢ɻ
(2) ͜ͷ۠ؒʹɺDIF1-0, PLL3-0, FS3-0, BCKO1-0, MSBS, BCKP, M/S bitͷઃఆΛߦͬͯԼ͍͞ɻ
(3) VCOMͷύϫʔΞοϓɿ PMVCM bit = “0” → “1”
֤ϒϩοΫΛ্ཱͪ͛Δલʹ࠷ॳʹVCOMΛ্ཱͪ͛ͯԼ͍͞ɻ
(4) MCKI pinͷϓϧμ΢ϯղআ : MCKPD bit = “1” → “0”
(5) MCKO ग़ྗͷઃఆ: MCKO bit = “1”
(6) PMPLL bit͕ “0” → “1”ʹͳΓɺMCKI pinʹΫϩοΫ͕͞څڙΕͨޙɺPLLಈ࡞͕ελʔτ͠·͢ɻPLLͷϩοΫ
࣌ؒ͸40ms(max)Ͱ͢ɻ
(7) PLL͕҆ఆޙɺMCKO pin ͔Βਖ਼ৗͳΫϩοΫ͕ग़ྗ͞Ε·͢ɻ
(8) ͜ͷ۠ؒͰ͸ɺMCKO pin ͔Βਖ਼ৗͰͳ͍ΫϩοΫ͕ग़ྗ͞Ε·͢ɻ
(9) MCKOΫϩοΫʹಉͨ͠ظBICK, FCKΫϩοΫΛೖྗ͍ͯͩ͘͠͞ɻ
MS0317-J-01
- 59 -
2004/11