AK4631 Datasheet, PDF (55/69 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4631]
γεςϜઃܭ
Figure 42͸γεςϜ઀ଓྫͰ͢ɻ۩ମతͳճ࿏ͱଌఆྫʹ͍ͭͯ͸ධՁϘʔυ(AKD4631)Λࢀরͯ͠Լ͍͞ɻ
1µ
2.2k
C
0.22µ
R
20k
220
1µ
0.1µ
Analog Supply
2.6∼3.6V
2.2µ+
10µ ₊
0.1µ
0.1µ
Cp Rp
1 VCOM
2 AVSS
3 AVDD
4 VCOC
5 PDN
6 CSN
7 CCLK
10
Top View
MIN 21
SVSS 20
SVDD 19
SPN 18
0.1µ 10µ
+
R2
SPP 17 _{R1 ZD2}
MCKO 16
Analog Supply
2.6∼5.25V
Speaker
ZD1
MCKI 15
Dynamic SPK :
R1,R2 : Short
ZD1,ZD2 : Open
Peizo SPK :
R1,R2 : 10Ω


ZD1,ZD2 : Required
0.1µ
+ _10µ
DSP or µP
Figure 42. Typical Connection Diagram
஫:
- AK4631ͷAVSS, DVSS, SVSS ͱपลίϯτϩʔϥ౳ͷάϥϯυ͸෼͚ͯ഑ઢͯ͠Լ͍͞ɻ
- ϓϧμ΢ϯϐϯҎ֎ͷσΟδλϧೖྗϐϯ͸Φʔϓϯʹ͠ͳ͍ͰԼ͍͞ɻ
- BEEP pin ͷ R ͱ C ͸దٓઃఆͯ͠Լ͍͞ɻ
- EXTϞʔυ(PMPLL bit = “0”) ͷ৔߹ɺVCOC pin͸ΦʔϓϯͰߏ͍·ͤΜɻ
- PLLϞʔυ(PMPLL bit = “1”) ͷ৔߹ɺVCOC pin ͷ Cp ͱ Rp ͸Table 42 ʹैͬͯઃఆͯ͠Լ͍͞ɻ
- MICOUT-AINؒͷίϯσϯαͱAIN ͷೖྗ఍߅Ͱ HPF Λߏ੒͠·͢ɻίϯσϯα͕ 0.22µFͷͱ͖ɺ
ΧοτΦϑप೾਺͸ɺtyp. 72Hz (min. 48Hz, max. 145Hz) Ͱ͢ɻ
Mode
0
1
2
3
4
5
6
7
12
13
Others
PLL3
bit
0
0
0
0
0
0
0
0
1
1
PLL2
bit
0
0
0
0
1
1
1
1
1
1
Others
PLLج४Ϋϩ
PLL1 PLL0
bit bit
οΫೖྗϐ
ϯ
ೖྗप೾਺
VCOC pinÍ·
Rp,Cp
Rp[Ω] Cp[F]
0
0
FCK pin
1fs
6.8k 220n
0
1
BICK pin
16fs
10k 4.7n
1
0
BICK pin
32fs
10k 4.7n
1
1
BICK pin
64fs
10k 4.7n
0
0
MCKI pin 11.2896MHz 10k 4.7n
0
1
MCKI pin 12.288MHz 10k 4.7n
1
0
MCKI pin
12MHz
10k 4.7n
1
1
MCKI pin
24MHz
10k 4.7n
0
0
MCKI pin
13.5MHz
10k 10n
0
1
MCKI pin
27MHz
10k 10n
N/A
Table 42. Setting of PLL Mode (*fs: Sampling Frequency)

PLLϩοΫ
࣌ؒ
(max)
160ms
2ms
2ms
2ms
40ms
40ms
40ms
40ms
40ms
40ms
Default
MS0317-J-01
- 55 -
2004/11