AK4631 Datasheet, PDF (34/69 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4631]
[3] ALC1ಈ࡞ઃఆखॱྫ
Table 15͸ɺALC1ͷઃఆྫͰ͢ɻԼهઃఆྫͰ͸ɺALC1͸ɺ0dB͔Βಈ࡞Λ։࢝͠·͢ɻ
Register Name
LMTH
LTM1-0
ZELM
ZTM1-0
WTM1-0
REF6-0
IPGA6-0
LMAT1-0
RATT
ALC1
Comment
fs=8kHz
Data Operation
Limiter detection Level
1
-4dBFS
Limiter operation period at ZELM = 1
00
Don’t use
Limiter zero crossing detection
0
Enable
Zero crossing timeout period
00
16ms
Recovery waiting period
*WTM1-0 bits should be the same data 00
16ms
as ZTM1-0 bits
Maximum gain at recovery operation
47H
+27.5dB
IPGA gain at the start of ALC1 operation 10H
0dB
Limiter ATT Step
00
1 step
Recovery GAIN Step
0
1 step
ALC1 Enable bit
1
Enable
Table 15. Examples of the ALC1 setting
fs=16kHz
Data Operation
1
-4dBFS
00
Don’t use
0
Enable
01
16ms
01
16ms
47H
+27.5dB
10H
0dB
00
1 step
0
1 step
1
Enable
ALC1ಈ࡞த͸ɺҎԼͷϏοτ΁ͷมߋΛ͢·͠ࢭېɻ͜ΕΒͷϏοτΛมߋ͢Δ৔߹͸ɺALC1ಈ࡞Λऴྃ
ʢALC1 bit = “0” or PMMIC bit = “0”ʣ͔ͯ͠ΒߦͬͯԼ͍͞ɻ
ɾLTM1-0, LMTH, LMAT1-0, WTM1-0, ZTM1-0, RATT, REF6-0, ZELMͷ֤Ϗοτ
ALC1ಈ࡞։࢝࣌ͷήΠϯΛઃఆ͢Δ৔߹͸ɺPMMIC bit = “1”͔ͭALC1 bit = “0”ͷঢ়ଶͰɺIPGA6-0 bit Λઃ
ఆͯ͠Լ͍͞ɻPMMIC bit = “0” ͷঢ়ଶͰ͸ɺIPGA6-0 bitsͷมߋ͸ IPGA ΁൓ө͞Ε·ͤΜɻ·ͨɺALC1 bit
= “1” Æ “0”ͱͨ͠ͱ͖ɺIPGAͷήΠϯ͸ALC1ಈ࡞ʹΑΓࣗಈઃఆ͞Εͨ࠷ऴ஋Λอ࣋͠·͢ɻ
Example:
Limiter = Zero crossing Enable
Recovery Cycle = 16ms @ fs= 8kHz
Limiter and Recovery Step = 1
Maximum Gain = +27.5dB
Manual Mode
Limiter Detection Level = -4dBFS
ALC2 bit = “1” (default)
WR (ZTM1-0, WTM1-0, LTM1-0)
(1) Addr=06H, Data=00H
WR (REF6-0)
(2) Addr=08H, Data=47H
WR (IPGA6-0) ^{* The value of IPGA should be}
the same or smaller than REF’s
WR (ALC1= “1”, LMAT1-0, RATT, LMTH, ZELM)
(3) Addr=09H, Data=10H
(4) Addr=07H, Data=61H
ALC1 Operation
Note : WR : Write
Figure 30. Registers set-up sequence at ALC1 operation
MS0317-J-01
- 34 -
2004/11