AK7758VN Datasheet, PDF (6/32 Pages) Asahi Kasei Microsystems – DSP with Stereo CODEC + Mic/Lineout Amp

[AK7758]
4.3. Sub DSP Block Diagram
Pointer CP0, CP1
DP0, DP1
Coefficient RAM
(CRAM)
3072w x 24-Bit
Data RAM (DRAM)
3072w x 28-Bit(24.4f)
CBUS(24-Bit)
DLP0, DLP1
OFREG
32w x 12-Bit
Delay RAM (DLRAM)
3072w x 28-Bit(24.4f)
DBUS(28-Bit)
MPX24
MPX24
X
Y
Multiply
24 x 24 → 48-Bit
48-Bit
28-Bit
52-Bit
MUL DBUS
SHIFT
48-Bit
A
B
ALU
52-Bit
Overflow Margin: 4-Bit
52-Bit
DR0  3
52-Bit
Over Flow Data
Generator
Micon I/F
Control
Serial I/F
DEC
Program RAM
(PRAM)
1024w x 36-Bit
PC
Stack : 5level(max)
TMP 12 x 28-Bit
PTMP(LIFO) 6 x 28-Bit
28bit x fifo16
CTMP (Main DSP)
Division 2424→24 _{Peak Detector}
Figure 3. Sub DSP Block Diagram
016003563-E-02-PB
-6-
2016/09