AK7758VN Datasheet, PDF (19/32 Pages) Asahi Kasei Microsystems – DSP with Stereo CODEC + Mic/Lineout Amp

[AK7758]
8.2. DC Characteristics
(Ta= -40~85°C, AVDD=3.3V, DVDD=1.2V, LVDD=3.0 ~ 3.6V, TVDD1/2=1.7 ~ 3.6V, AVSS=DVSS=0V)
Parameter
Symbol
Min.
Typ.
Max. Unit
80%LVDD
High Level Input Voltage
VIH 80%TVDD1
V
80%TVDD2
20%LVDD
Low Level Input Voltage
VIL
20%TVDD1 V
20%TVDD2
SCL, SDA High Level Input Voltage
VIH2 70%TVDD2
V
SCL, SDA Low Level Input Voltage
VIL2
30%TVDD2 V
DMDAT High Level Input Voltage (DMIC bit = “1”) VIH3 65%AVDD
V
DMDAT Low Level Input Voltage (DMIC bit = “1”)
VIL3
35%AVDD V
High Level Output Voltage Iout= -100A (Note 31)
VOH
TVDD1-0.3
TVDD2-0.3
V
Low Level Output Voltage Iout=100A (Note 32)
VOL
0.3
V
SCL, SDA Low Level Output Voltage TVDD2 ≥ 2.0V VOL2
Iout=3mA
TVDD2 < 2.0V VOL2
0.4
V
20%TVDD2 V
DMCLK High Level Output Voltage Iout = -80A
(DMIC bit = “1”)
VOH3 AVDD-0.4
V
DMCLK Low Level Output Voltage Iout = 80A
(DMIC bit = “1”)
VOL3
0.4
V
Input Leak Current (Note 33)
Iin
±10
A
Input Leak Current at Pulled-down Pins
LDO Mode (LDOE pin = “H”) and
Iid
Power-down (PDN pin = “L”) (Note 34)
66
A
Input Leak Current at Pulled-down Pins
Power-down Release (PDN pin = “H”) (Note 35)
Iid
77
A
Input Leak Current at the XTI pin
lix
17
A
Note 31. Except XTO pin
Note 32. Except SDA and XTO pins.
Note 33. Internal Pulled-down pins, except the XTI pin
Note 34. LRCK, BICK, SDOUT1/MAT0/JX2, SDOUT3/MAT1/JX3, RDY/GP0/SDIN3, SDOUT2/EEST,
STO/GP1/SDOUT4 pin (Typ. 50 kΩ@3.3V)
Note 35. LRCK, BICK, SDOUT1/MAT0/JX2, SDOUT3/MAT1/JX3, RDY/GP0/SDIN3 pin
(Typ. 46kΩ@3.3V)
016003563-E-02-PB
- 19 -
2016/09