AK7758VN Datasheet, PDF (27/32 Pages) Asahi Kasei Microsystems – DSP with Stereo CODEC + Mic/Lineout Amp

[AK7758]
8.5.5. I²C-BUS Interface
(Ta= -40~85°C; AVDD=LVDD=3.0~3.6V, TVDD1/2=1.7~3.6V, DVDD=1.14~1.3V, AVSS=DVSS=0V)
Parameter
I²C Timing
Symbol Min. Typ. Max. Unit
SCL clock frequency
fSCL
400 kHz
Bus Free Time Between Transmissions
tBUF
1.3
s
Start Condition Hold Time (prior to first Clock pulse) tHD:STA 0.6
s
Clock Low Time
tLOW
1.3
s
Clock High Time
tHIGH
0.6
s
Setup Time for Repeated Start Condition
tSU:STA 0.6
s
SDA Hold Time from SCL Falling
tHD:DAT 0
0.9 s
SDA Setup Time from SCL Rising
tSU:DAT 0.1
s
Rise Time of Both SDA and SCL Lines
tR
0.3 s
Fall Time of Both SDA and SCL Lines
tF
0.3 s
Setup Time for Stop Condition
tSU:STO 0.6
s
Pulse Width of Spike Noise Suppressed By Input Filter tSP
0
50
ns
Capacitive load on bus
Cb
400 pF
SDA
tBUF
tLOW tR
tHIGH tF
SCL
tHD:STA
Stop Start
tHD:DAT
tSU:DAT tSU:STA
Start
Figure 16. I²C BUS Interface Timing
VIH2
VIL2
tSP
VIH2
VIL2
tSU:STO
Stop
016003563-E-02-PB
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2016/09