AK7758VN Datasheet, PDF (28/32 Pages) Asahi Kasei Microsystems – DSP with Stereo CODEC + Mic/Lineout Amp

[AK7758]
8.5.6. Digital Microphone Interface
(Ta = -40°C~85°C, AVDD = LVDD = 3.0~3.6V, TVDD1/2 = 1.7~3.6V, DVDD = 1.14~1.3V,
AVSS=DVSS= 0V; CL=100pF)
Parameter
Symbol
Min.
Typ. Max.
DMDAT
Serial Data Input Latch Setup Time
tDMDS
50
Serial Data Input Latch Hold Time
tDMDH
0
DMCLK
Clock Frequency (Note 52)
fDMCK
0.5
64fs
3.1
Duty Cycle
dDMCK
40
50
60
Rise Time
tDMCKR
10
Fall Time
tDMCKF
10
Note 52. Clock frequency is determined by the sampling rate (fs) selected by SDALL[2:0] bits.
Unit
ns
ns
MHz
%
ns
ns
DMCLK
tDMCK
tDMCKR
tDMCKL
fDMCK = 1 / tDMCK
dDMCK = 100 x tDMCKL / tDMCK
tDMCKF
65%AVDD
50%AVDD
35%AVDD
DMCLK
DMDAT
tDMDS
tDMDH
DMCLKP bit = “1”
50%AVDD
VIH3
VIL3
DMCLK
DMDAT
tDMDS
tDMDH
DMCLKP bit = “0”
Figure 17. Digital Microphone Interface Timing Wave Form
016003563-E-02-PB
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50%AVDD
VIH3
VIL3
2016/09