AK4589_1 Datasheet, PDF (58/76 Pages) Asahi Kasei Microsystems – 2/8-Channel Audio CODEC with DIR

ASAHI KASEI
[AK4589]
Register Definitions
Reset & Initialize
Addr
Register Name
00H CLK & Power Down Control
R/W
Default
D7
CS12
R/W
0
D6
BCU
R/W
1
D5
CM1
R/W
0
D4
CM0
R/W
0
D3
OCKS1
R/W
0
D2
OCKS0
R/W
0
D1
PWN
R/W
1
D0
RSTN2
R/W
1
RSTN2: Timing Reset & Register Initialize
0: Reset & Initialize
1: Normal Operation
PWN: Power Down
0: Power Down
1: Normal Operation
OCKS1-0: Master Clock Frequency Select
CM1-0: Master Clock Operation Mode Select
BCU: Block start & C/U Output Mode
When BCU=1, the three Output Pins(BOUT, COUT, UOUT) become to be enabled.
The block signal goes high at the start of frame 0 and remains high until the end of frame 31.
CS12: Channel Status Select
0: Channel 1
1: Channel 2
Selects which channel status is used to derive C-bit buffers, AUDION, PEM, FS3, FS2, FS1, FS0,
Pc and Pd. The de-emphasis filter is controlled by channel 1 in the Parallel Mode.
Format & De-emphasis Control
Addr
Register Name
01H Format & De-em Control
R/W
Default
D7 D6 D5 D4 D3 D2 D1 D0
0 DIF2 DIF1 DIF0 DEAU DEM1 DEM0 DFS
RD R/W R/W R/W R/W R/W R/W R/W
0
1
1
0
1
0
1
0
DFS: 96kHz De-emphasis Control
DEM1-0: 32, 44.1, 48kHz De-emphasis Control (see Table 24.)
DEAU: De-emphasis Auto Detect Enable
0: Disable
1: Enable
DIF2-0: Audio Data Format Control (see Table 29.)
MS0339-E-00
- 58 -
2004/09