AK8859VQ Datasheet, PDF (55/73 Pages) Asahi Kasei Microsystems – NTSC/PAL/SECAM Digital Video Decoder

[9.1.8.] Sub Address 0x07 “Control 0 Register (R/W)”
[AK8859VQ]
Sub Address: 0x07
bit 7
bit 6
VERTS ACTSTA2
Default Value
0
0
bit 5
ACTSTA1
0
bit 4
ACTSTA0
0
bit 3
NSIGMD1
0
bit 2
NSIGMD0
0
Default Value: 0x00
bit 1
bit 0
DPAL1 DPAL0
0
0
Control 0 Register Definition
Bit ^Register
Name
bit 0 DPAL0
~
~
bit 1 DPAL1
Deluxe PAL
bit 2 NSIGMD0
~
~
bit 3 NSIGMD1
No Signal
Output Mode
bit 4 ACTSTA0
~
~
bit 6 ACTSTA2
Active Video
Start
bit 7 VERTS
Vertical Sync
Way
R/W Definition
Setting for color averaging* (PAL phase correction block)
Also applicable to NTSC.
[ DPAL1 : DPAL0 ]
R/W [00]: Adaptive phase correction ON
[01]: Phase correction ON
[10]: Phase correction OFF
[11]: Reserved
Setting for output on no-signal detection
[ NSIGMD1 : NSIGMD0 ]
R/W ^{[00]: Black-level output}
[01]: Blue-level (Blueback) output
[10]: Input status (sandstorm) output
[11]: Reserved
Fine-tuning video data decode start position
delay or advance 1 sample unit is 13.5MHz (about 74ns)
[ ACTSTA2 : ACTSTA0 ]
[001]: 1Sample delay
[010]: 2Sample delay
R/W [011]: 3Sample delay
[000]: Normal start position
[101]: 3Sample advance
[110]: 2Sample advance
[111]: 1Sample advance
[100]: Reserved
Vertical sync mechanism setting
R/W [0]: VLOCK mechanism
[1]: Direct lock mechanism
MS1178-E-00
AKM Confidential
- 55 -
2010/04