AK8859VQ Datasheet, PDF (26/73 Pages) Asahi Kasei Microsystems – NTSC/PAL/SECAM Digital Video Decoder

[AK8859VQ]
[7.12.] Output pin status
The AK8859VQ output from the DATA[7:0]-pin, VD_F-pin, VAR-pin, VARSUB-pin and HD-pin can each be
fixed at Low via register.
Setting each digital output pins fixed to Low output
Name
Definition
[0]: Normal output
DL
[1]: [D7: D0] pin output fixed at Low.
VD_FL
[0]: Normal output
[1]: VD_F pin output fixed at Low.
VARL
[0]: Normal output
[1]: VAR and VARSUB pin output fixed at Low.
HL
[0]: Normal output
[1]: HD pin output fixed at Low.
Notes
Sub Address: 0x05 [3:0]
Default: Low output
Default: Low output
Default: Low output
Default: Low output
In addition, the output from the DTCLK, DATA[7:0], VD_F, VAR, VARSUB and HD pins can be set to Hi-z
output via register.
Setting digital output pins* to Hi-z output
Sub Address: 0x05 [4]
Name Definition
Notes
OEN
[0]: Normal output
[1]: Hi-Z output
Default: [0] Normal output
*Collective term for DTCLK, DATA[7:0], HD, VD_F, VAR and VARSUB pins.
However, the PDN pin states will have priority regardless of these register setting. When PDN pin is Low
output, the output from the DTCLK, DATA[7:0], VD_F, VAR, VARSUB and HD pins is Low output.
The relation between PDN pin and digital output pin status is show as follows:
PDN
Register setting
Digital output pins status
-pin
OEN DL VD_FL VAR HL
-bit -bit -bit -bit -bit
DATA[7:0]
VD_F
VAR
VARSUB
HD
L
XX
X
XX
Low
DTCLK
H
HX
X
XX
Hi-z
H
LL
L
L L DOUT DOUT DOUT DOUT DOUT DOUT
H
LH
H
HH
Low
Low Low
Low
Low DOUT
*DOUT is normal output.
MS1178-E-00
AKM Confidential
- 26 -
2010/04