AK8859VQ Datasheet, PDF (35/73 Pages) Asahi Kasei Microsystems – NTSC/PAL/SECAM Digital Video Decoder

[AK8859VQ]
PGA1 is used for CVBS and Y signals gain processing. PGA2 is used for C signal gain processing.
Setting for PGA1 value
Name
Definition
PGA1_0
~
PGA1_7
PGA1 gain setting.
PGA gain is set by above equation.
Sub Address: 0x0A [7:0]
Setting for PGA2 value
Name
Definition
PGA2_0
~
PGA2_7
PGA2 gain setting.
PGA gain is set by above equation.
Sub Address: 0x0B [7:0]
This register also can be used to read the current setting of the AGC setting.
If AGC is enable, PGA1[7:0]-bit and PGA2[7:0]-bit setting value has no effect.
If AGC is disable, PGA1[7:0]-bit and PGA2[7:0]-bit setting is effective and the gain setting can be manually
entered.
[7.26.] AGC (Auto Gain Control)
The AGC of the AK8859VQ measures the size of the input signal (i.e. the difference between the sync tip
and pedestal levels), and adjusts the PGA value to bring the sync signal level to 286mV/300mV.
The AGC function in the AK8859VQ is adaptive, and thus includes peak AGC as well as sync AGC. Peak
AGC is effective for input signals in which the sync signal level is appropriate and only the active video
signal is large.
Sync signal level of composite video signal and S (Y/C) video signal input are shown as follows.
NTSC-M,J, NTSC-4.43, PAL-M…………………………286mV
PAL-B,D,G,H,I,N, PAL-Nc, PAL-60, SECAM…………. 300mV
Setting for ON/OFF of AGC
Name
Definition
AGC
[0]: AGC OFF
[1]: AGC ON
Sub Address: 0x0C [0]
Setting for AGC non-sensing range
Name
Definition
AGCC0
~
AGCC1
[ AGCC1 : AGCC0 ]
[00]: ±2LSB
[01]: ±3LSB
[10]: ±4LSB
[11]: None
Sub Address: 0x0C [3:2]
MS1178-E-00
AKM Confidential
- 35 -
2010/04