AK8859VQ Datasheet, PDF (32/73 Pages) Asahi Kasei Microsystems – NTSC/PAL/SECAM Digital Video Decoder

[AK8859VQ]
[7.22.2] Output timing signal diagram
[7.22.2.1.] Line-locked and frame-locked clock modes
When the AK8859VQ is connected to the system with no ITU-R BT.656 interface, HD, VD, DVALID and
FIELD signals is output.
The relations between HD, VD and FIELD signals are shown as follow.
525-Line input (For example, composite video signal input timing is shown below)
CVBS
523 524 525 1
HD
2
3
4
5
6
7
8
9
10
11
VD
FIELD
EVEN
ODD
CVBS
HD
VD
FIELD
261 262 263 264 265 266 267 268 269 270 271 272 273 274
ODD
EVEN
625-Line input (For example, composite video signal input timing is shown below)
CVBS
620 621 622 623 624 625
1
2
3
4
5
6
7
8
HD
VD
FIELD
EVEN
ODD
CVBS
HD
VD
FIELD
308 309 310 311 312 313 314 315 316 317 318 319 320 321
ODD
EVEN
The relations between HD signal, DVALID signal and EAV/SAV code are shown in the following timing
diagram.
DTCLK
HD
DVALID
DATA [7:0]
FF 00 00 SAV Cb0 Y0 Cr0 Y1 Cb1 Y2 Cr1
FF 00 00 EAV
FF
128CLK
244CLK
(264CLK)
1440CLK
32CLK
(24CLK)
*The numbers shown in the ( ) is refer to clock number of 625-Line.
MS1178-E-00
AKM Confidential
- 32 -
2010/04