AK4368 Datasheet, PDF (48/58 Pages) Asahi Kasei Microsystems – PLL & HP-AMP DAC

ASAHI KASEI
[AK4368]
„ ৄࡉઆ໌

Addr
00H
Register Name
Power Management
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
PMPLL PMLO MUTEN PMHPR PMHPL PMDAC PMVCM
RD R/W R/W R/W R/W R/W R/W R/W
0
0
0
0
0
0
0
0
PMVCM: VCOMͷύϫʔϚωδϝϯτ
0: Power OFF (Default)
1: Power ON
PMDAC: DACͷύϫʔϚωδϝϯτ
0: Power OFF (Default)
1: Power ON
OFF͔ΒONʹมߋͨ͠৔߹͸ઃఆ͞ΕͨATT஋౳ͷϨδελͷ಺༰ͰύϫʔΞοϓ͞Ε·͢ɻ
PMHPL: Lch ϔουϑΥϯΞϯϓͷύϫʔϚωδϝϯτ
0: Power OFF (Default)
1: Power ON
PMHPR: Rch ϔουϑΥϯΞϯϓͷύϫʔϚωδϝϯτ
0: Power OFF (Default)
1: Power ON
MUTEN: ϔουϑΥϯΞϯϓͷϛϡʔτίϯτϩʔϧ
0: ϛϡʔτ (Default)ɻग़ྗ͸HVSS(0V)ʹͳΓ·͢ɻ
1: ௨ৗಈ࡞ɻग़ྗͷDCిѹ͸0.475 x AVDDʹͳΓ·͢ɻ
PMLO: εςϨΦϥΠϯΞ΢τͷύϫʔϚωδϝϯτ
0: Power OFF (Default)ɻग़ྗ͸Hi-ZʹͳΓ·͢ɻ
1: Power ON
PMPLL: PLLͷύϫʔϚωδϝϯτ
0: Power OFF: EXT mode (Default)
1: Power ON: PLL mode
͜ͷΞυϨεͷϏοτΛON/OFFʢ“1” /“0”ʣ͢Δ͜ͱͰ෦෼తʹύϫʔμ΢ϯ͢Δ͜ͱ͕Ͱ͖·͢ɻ·
ͨɺPDN pinΛ “L”ʹ͢Δ͜ͱͰɺϨδελ஋ͷઃఆʹؔΘΒͣશճ࿏ΛҰ౓ʹύϫʔμ΢ϯͰ͖·͢ɻ͜
ͷ৔߹ɺϨδελ஋͸ॳظԽ͞Ε·͢ɻ
·ͨɺPMVCM, PMDAC, PMHPL, PMHPR, PMLO, PMPLL, MCKO bitsΛ͢΂ͯ“0”ʹ͢Δ͜ͱͰɺશճ࿏
ΛҰ౓ʹύϫʔμ΢ϯ͢Δ͜ͱ͕Ͱ͖·͢ɻ͜ͷͱ͖Ϩδελͷ಺༰͸อ࣋͞Ε͍ͯ·͢ɻফඅిྲྀ͸
20µA(typ)ͳͷͰɺ׬શʹγϟοτμ΢ϯ(typ. 1µA)͢Δʹ͸PDN pin = “L”ͱͯ͠Լ͍͞ɻ
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
01H PLL Control
FS3
FS2
FS1
FS0 PLL3 PLL2 PLL1 PLL0
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
Default
1
0
0
0
0
0
0
0
FS3-0: αϯϓϦϯάप೾਺ͷબ୒
PLL mode: Table 2
EXT mode: Table 6
PLL3-0: MCKIप೾਺ͷબ୒
PLL mode: Table 1
EXT mode: ແޮ
MS0409-J-01
- 48 -
2005/08