AK4368 Datasheet, PDF (46/58 Pages) Asahi Kasei Microsystems – PLL & HP-AMP DAC

ASAHI KASEI
[AK4368]
SDA
SCL
S
start condition
Figure 42. ։࢝৚݅ͱఀࢭ৚݅
P
stop condition
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
Figure 43. I²CόεͰͷ֬ೝԠ౴
acknowledge
8
9
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 44. I²CόεͰͷϏοτసૹ
MS0409-J-01
- 46 -
2005/08