AK4368 Datasheet, PDF (19/58 Pages) Asahi Kasei Microsystems – PLL & HP-AMP DAC

ASAHI KASEI
[AK4368]
Mode
0
1
2
4
5
6
8
9
10
3, 7,
11-15
FS3
FS2
FS1
FS0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
0
1
0
1
0
1
1
0
1
0
0
0
1
0
0
1
1
0
1
0
fs
48kHz
24kHz
12kHz
32kHz
16kHz
8kHz
44.1kHz
22.05kHz
11.025kHz
Others
N/A
Table 2. αϯϓϦϯάप೾਺ (PLL mode)
Default
PS1
PS0
MCKO
0
0
256fs Default
0
1
128fs
1
0
64fs
1
1
32fs
Table 3. MCKOप೾਺ (PLL mode, MCKO bit = “1”)
MCKI pin
MCKO pin
BICK pin
LRCK pin
Master Mode (M/S bit = “1”)
Power Up
Power Down
PLL Unlock
(PMDAC bit= PMPLL bit= “1”) (PMDAC bit= PMPLL bit= “0”)
Refer to Table 1.
Input or
Refer to Table 1.
fixed to “L” or “H”
MCKO bit = “0”: “L”
“L”
MCKO bit = “0”: “L”
MCKO bit = “1”: Output
MCKO bit = “1”: Unsettling
BF bit = “1”: 64fs output
“L”
“L”
BF bit = “0”: 32fs output
Output
“L”
“L”
Table 4. Clock Operation in Master mode (PLL mode)
MCKI pin
MCKO pin
BICK pin
LRCK pin
Slave Mode (M/S bit = “0”)
Power Up
Power Down
PLL Unlock
(PMDAC bit= PMPLL bit= “1”) (PMDAC bit= PMPLL bit= “0”)
Refer to Table 1.
Input or
Refer to Table 1.
fixed to “L” or “H”
MCKO bit = “0”: “L”
“L”
MCKO bit = “1”: Output
MCKO bit = “0”: “L”
MCKO bit = “1”: Unsettling
Input
Fixed to “L” or “H” externally Input or
Fixed to “L” or “H”
externally
Input
Fixed to “L” or “H” externally Input or
Fixed to “L” or “H”
externally
Table 5. Clock Operation in Slave mode (PLL mode)
MS0409-J-01
- 19 -
2005/08