AK4368 Datasheet, PDF (17/58 Pages) Asahi Kasei Microsystems – PLL & HP-AMP DAC

ASAHI KASEI
[AK4368]
ಈ࡞આ໌
„
γεςϜΫϩοΫ

1) PLLϞʔυ(PMPLL bit = “1”)
಺ଂͷߴਫ਼౓ΞφϩάPLL͸PLL3-0 bits, FS3-0 bits (Table 1, Table 2) Ͱબ୒ͨ͠ΫϩοΫʹԠͯ͡ಈ࡞͠·͢ɻ
MCKOͷग़ྗΫϩοΫ͸PS1-0 bits (Table 3)Ͱઃఆ͞Εͨप೾਺Λग़ྗ͠ɺMCKO bit ʹͯON/OFFՄೳͰ͢ɻ
PLLͷϩοΫ࣌ؒ͸Table 1Λࢀর͍ͯͩ͘͠͞ɻಈ࡞த(PMDAC bit = “1”)ʹαϯϓϦϯάप೾਺Λมߋ͢Δ
৔߹͸ɺιϑτϛϡʔτΛ͔͚Δ͔ɺ͋Δ͍͸l0”σʔλΛೖྗ͔ͯ͠ΒαϯϓϦϯάप೾਺ͷมߋΛߦͬ
͍ͯͩ͘͞ɻ
ϚελϞʔυͱεϨʔϒϞʔυͷ੾Γସ͑͸M/S bitͰߦ͍·͢ɻ“1”ͰϚελϞʔυɺ“0”ͰεϨʔϒϞʔυ
Ͱ͢ɻAK4368͸ύϫʔμ΢ϯ࣌ (PDN pin = “L”)ɺͼٴύϫʔμ΢ϯղআޙ͸εϨʔϒϞʔυͰ͢ɻύϫʔμ
΢ϯղআޙɺM/S bitΛ “1”ʹมߋ͢Δ͜ͱͰϚελϞʔυʹͳΓ·͢ɻ
ϚελϞʔυ࣌ɺ֎෦͔Β11.2896MHz, 12MHz, 13MHz, 14.4MHz, 15.36MHz, 19.2MHz, 19.68MHz, 19.8MHz,
26MHz, 27MHzͷΫϩοΫΛೖྗ͠ɺ಺෦ͷPLLʹΑΓɺMCKO, BICK, LRCKΫϩοΫΛੜ੒͠ग़ྗ͠·͢ɻ
(Figure 11)
AK4368
27MHz,26MHz,19.8MHz,19.68MHz,
19.2MHz,15.36MHz,14.4MHz,13MHz,
12MHz,11.2896MHz
DSP or µP
MCKI
MCKO
BICK
LRCK
256fs/128fs/64fs/32fs
32fs, 64fs
1fs
MCLK
BCLK
LRCK
SDATA
SDTO
Figure 11. PLL Master Mode
ϚελϞʔυͰ࢖༻͢Δ৔߹ɺM/S bitʹ “1”͕ॻ͖ࠐ·ΕΔ·ͰɺAK4368ͷLRCK, BICK pin͸ϑϩʔςΟϯ
άͷঢ়ଶͰ͢ɻͦͷͨΊɺAK4368ͷLRCK, BICK pinʹ100kΩఔ౓ͷϓϧΞοϓ͋Δ͍͸ϓϧμ΢ϯ఍߅Λೖ
ΕΔඞཁ͕͋Γ·͢ɻ
ϚελϞʔυ࣌(M/S bit = “1”)ɺPMPLL bit = “0” Æ “1” ͓ΑͼPMDAC bit = “0” Æ “1”ઃఆʹͨ͠ޙPLL͕ϩο
Ϋ͢Δ·ͰͷؒɺLRCKͱBICK͸ “L”Λग़ྗɺMCKO bit = “1”ͷͱ͖MCKO pin ͔Β͸ਖ਼ৗͰͳ͍प೾਺ͷΫ
ϩοΫ͕ग़ྗ͞Ε·͢ɻMCKO bit = “0”ͷ৔߹͸ɺMCKO pin ͸ “L”Λग़ྗ͠·͢ɻPLLϩοΫޙɺLRCKͱ
BICK͕AK4368͔Βग़ྗ͞Ε·͢(Table 4)ɻ
MS0409-J-01
- 17 -
2005/08