AK8998 Datasheet, PDF (41/59 Pages) Asahi Kasei Microsystems – Preliminary

[AK8998/W/D]
Note 1) Lower line of each data represents the factory settings written to EEPROM.
Note 2) Access to the reserved addresses is prohibited.
Note 3) Write "0" to the unused D[7:0].
Note 4) For a packaged device, registers marked with * are adjusted before shipment. Therefore, defaults are not "0".
5.2) Control Register (Volatile Memory) Map
Name
Content
CM1 Adjustment mode
CM2
OSC variable ratio
Note4)
SH1
S/H circuit output error
adjustment 1
SH2
S/H circuit output error
adjustment 2
SH3
S/H circuit output error
adjustment 3
SH4
S/H circuit output error
adjustment 4
Address
(hex)
00h
01h
19h
D7
CT[7]
0
10h
12h
17h
D6
CT[6]
0
SH3[6]
0
D5
CT[5]
0
SH2[5]
0
Data ^{Note 1)}
D4
D3
AM[3]
0
CT[4]
CT[3]
0
0
SH1[3]
0
SH2[4]
0
SH4[3]
0
Reserved
others
Note 1) Lower line of each data represents the control register data upon power-up.
Note 2) Access to the reserved addresses is prohibited.
Note 3) Write "0" to the unused D[7:0].
Note 4) Access to this register serves as ReadOnly.
D2
AM[2]
0
CT[2]
0
SH2[2]
0
D1
AM[1]
0
CT[1]
0
SH1[3]
0
D0
AM[0]
0
CT[0]
0
6) EEPROM and control register Description
6.1) Description of EEPROM
6.1.1) Adjustment Section EEPROM
Offset and span adjustment should be made after measurement mode setup and adjustment of the
reference generator section including VREF, IREF, OSC and VTMP.
MSxxxxx-E-00
- 38 -
2011/12