AK8998 Datasheet, PDF (29/59 Pages) Asahi Kasei Microsystems – Preliminary

[AK8998/W/D]
Address : 10 hex D[3:0]=EFR[3:0]
EFR[3:0]
Ratio Frequency ∆f
Dec Hex
Bin
(%)
(kHz)
-5 B
1011
-34
-251
-4 C
1100
-25
-197
-3 D
1101
-17
-146
-2 E
1110
-11
-99
-1 F
1111
-5
-52
0
0
0000
0
0
1
1
0001
5
49
2
2
0010
10
106
3
3
0011
14
162
4
4
0100
18
224
5
5
0101
22
274
6
6
0110
25
329
7
7
0111
28
384
Note1) Hex 8 to A are prohibited for setup.
Comments
Default
When High level period is not 2 msec, the ideal value of CT [7:0] can be calculated as
follows.
Considering the calculated ideal value as 100%, and a ratio should be redefined. Please set
the adjustment data of oscillation frequency as the sum of the ratio of CT [7:0] data and the
ratio of EFR [3:0] data is close to 0%.
Count value[time]=High time[msec] / 2 * 100
ex.) In the case of 3 msec, 100 time → 150 time.
4. VTMP Adjustment (completed when shipped in package form)
Temperature sensor output (VTMP) voltage is adjusted to match the VREF voltage.
When the external temperature sensor is used, connect the external temperature sensor to the
EXTMP pin, and set up a measurement mode EEPROM (address: 0Dh, data ETMP[0]= 0h).
VTMP voltage is observed at VOUT pin while the CSCLK pin High (CSCLK High Time) after the
writing of an adjustment mode register (C address: 00h, data AM[3:0]= 4h).
*In sampling frequency 1kHz mode (ESF[0] =1h), the external temperature sensor (ETMP[0] =0h)
cannot be used.
Twr_REG CSCLK High Time
1
4
9
16
1
CSCLK
VOUT
Analog
Output
Hi-z
VTMP monitor
I2
5. S/H Circuit Output Error Adjustment
The S/H circuit output voltage is adjusted to become 0.0V at VOUT pin by using the Output
reference voltage adjustment EEPROM (address:0Ah data:ELV[8], address:0Bh
data:ELV[7:0]).
MSxxxxx-E-00
- 28 -
2012/11