AK8998 Datasheet, PDF (20/59 Pages) Asahi Kasei Microsystems – Preliminary

[AK8998/W/D]
9-2-6) Supply Voltage & Temperature Sensitivity Variation Adjustment Circuit (STV) ^Note)
VDD=3, 3.3, 5V±5%, Ta=-20 to 85ºC, register default, unless otherwise noted
Item
Symbol
Conditions
Min.
Typ.
Max. units Comments
Measurement in test mode after offset voltage and span voltage adjustment
SV1 SV circuit initial
5.0 %
Sensitivity variation
characteristics 1
to supply voltage
SV2
operation,
ESTC[0]=1h
SV circuit 2^nd
operation,
±0.4
% Based on
SV1
ESTC[0]=1h
ST1 ST circuit initial
5.0 %
Sensitivity variation
characteristics 1
to operating temp.
ST2
operation,
ESTC[0]=1h
ST circuit 2^nd
operation,
±0.4
% Based on
ST1
ESTC[0]=1h
SV3 SV circuit initial
5.0 %
Sensitivity variation
characteristics 2
to supply voltage
SV4
operation,
ESTC[0]=0h
SV circuit 2^nd
operation,
±0.2
% Based on
SV3
ESTC[0]=0h
ST3 ST circuit initial
5.0 %
Sensitivity variation
characteristics 2
to operating temp.
ST4
operation,
ESTC[0]=0h
ST circuit 2^nd
operation,
ESTC[0]=0h
±0.2
% Based on
ST3
9-2-7) LPF, S/H & Buffer
VDD=3, 3.3, 5V±5%, Ta=-20 to 85ºC, register default, unless otherwise noted
Item
Symbol
Conditions
Min.
Typ.
Max. units Comments
Measurement in test mode after offset voltage and span voltage adjustment
LPF freq.
Fc1
response
40
60
80
kHz
S/H&Buffer gain SHG
1.935 2.222 2.523 times
S/H&Buffer out SHerr
pre-adj. error
-65
65
mV
BUF gain adj.
width
Bufg
1.000 1.111 1.222 ^times
Vbuf+ Load resistance
0.98
V
VOUT output
9.5kΩ
*VDD
voltage range
Vbuf- (with VDD or VSS)
0.02 V
*VDD
BUF feedback
resistor value
Rbuf
102
146
190
kΩ
MSxxxxx-E-00
- 20 -
2012/11