AK4213 Datasheet, PDF (36/38 Pages) Asahi Kasei Microsystems – Mono Class-D SPK-Amp with Stereo Cap-less HP-Amp

[AK4213]
SYSTEM DESIGN
Figure 29 shows the system connection diagram for the AK4213. The evaluation board [AKD4213] demonstrates the
optimum layout, power supply arrangement and measurement results.
Analog Input
Analog Input
Headphone
Power Supply
2.6∼3.6V
2.2µ
+
0.1µ
Power Supply
3.0∼5.5V
HPR
LIN3/IN3-
VCOM
RIN1/IN+
SVDD
LIN1/IN1-
+
0.1µ
10µ
HPL
RIN3/IN3+ RIN2/IN2+
SPN
VSS2
SPP
(Note)
2.2µ
+
0.1µ
PVEE
VSS3
PVDD
PDN
LIN2/IN2-
Top View
TEST
SDA
TVDD
RVINN
SPIN
RVINP
Speaker
3.9Ω
3.9Ω
0.1µ
Analog Input
CP
CN
SCL
VSS1
AVDD
MIXO
+
2.2µ
(Note)
0.1µ 0.1µ
+ _10µ
Analog Ground
uP
Power Supply
1.6∼3.6V
Digital Ground
Figure 29. Typical Connection Diagram
Notes:
- These capacitors should use low ESR(Equivalent Series Resistance) over all temperature range. When these
capacitors are polarized, the positive side should be connected CP pin or analog ground.
- VSS1, VSS2, and VSS3 should be connected to same analog ground plane.
- A 2.2μF electrolytic capacitor in parallel with a 0.1μF ceramic capacitor attached to the VCOM pin eliminates the
effects of high frequency noise. No load current may be taken from the VCOM pin.
- AC coupling capacitor of 0.22μF should be connected to LIN/RIN pins to reduce pop noise at the power-up of the
input volume block.
MS0949-E-01
- 36 -
2008/07