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AK4213 Datasheet, PDF (16/38 Pages) Asahi Kasei Microsystems – Mono Class-D SPK-Amp with Stereo Cap-less HP-Amp | |||
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[AK4213]
When PMSPK bit is set to â0â, the speaker block (ALC + Speaker-Amp) can be powered-down completely. The
power-up / down transition time is 30ms (typ.) and 48ms (max).
The write operation to SPGA5-0 bits is prohibited within 1.6ms after PMSPK bit is set to â1â.
PMSPK bits
Speaker-Amp
0
Power-down
1
Power-up & Output
Table 3. Speaker-Amp output state
(default)
â Bypass Mode
When BYPE bit is â1â (SW1=SW2=ON), input signals to the RVINP pin and the RVINN pin are output from the SPP pin
and the SPN pin respectively. Then SPK-Amp is in Hi-Z. When BYPE bit is â0â (SW1=SW2=OFF), the signal of
SPK-Amp are output from the SPP/SPN pin. In case of PMSPK bit = â1â, BYPE bit is ignored.
Bypass Mode can be ON when all power management register are â0â setting including VCOM and inter-oscilloscope. In
case of Bypass Mode setting, PMVCM bit should be set to â1â if thermal shut-down function is used.
PMSPK bit BYPE bit
Mode
0
0
Power-down (SPP/SPN pins are Hi-Z)
0
1
Bypass Mode
1
x
Speaker Mode
Table 4. Speaker and Receiver Modes (x: Donât care)
Receiver-AMP
3.9Ω
3.9Ω
RVINN pin
RVINP pin
AK4213
SW1
SPK-AMP
ALC
SPP pin
SPN pin
Speaker
SW2
Figure 12. Bypass Mode
<Example of control sequence>
1. Speaker Mode à Bypass Mode
a. Spkeaer Amp Power -down : PMSPK bit = â1â Ã â0â(Figure 18 show the details of sequence)
b. Wait more than 500μs
c. Bypass Mode enable( SW1=SW2=ON): BYPE bit = â0â Ã â1â
2. Bypass Mode à Speaker Mode
a. Bypass Mode ignore (SW1=SW2=OFF): BYPE bit = â1â Ã â0â
b. Speaker-Amp power-up: Figure 18 shows the details of sequence.
MS0949-E-01
- 16 -
2008/07
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