AK4213 Datasheet, PDF (21/38 Pages) Asahi Kasei Microsystems – Mono Class-D SPK-Amp with Stereo Cap-less HP-Amp

[AK4213]
■ Charge Pump Circuit
The internal charge pump circuit generates negative voltage(PVEE) from PVDD voltage for headphone amplifiers. When
PMCP bit is set to “1”, the charge pump circuit is powered-up. Then PMOSC and PMVCM must be set to “1”.
The power up time of charge pump circuit is typically 6.2ms and maximum 10ms.When PMHPL bit = “1” or PMHPR bit
= “1”, the Headphone-Amp is powered-up after the charge pump circuit is powered-up (Figure 17).
■ Headphone-Amp (HPL/HPR pins)
Power supply voltage for headphone amplifiers is applied from a regulator for positive power and charge-pump for
negative power. Regulator is driven by SVDD and charge-pump is driven by PVDD. The PVEE pin outputs the negative
voltage generated by the internal charge pump circuit. The headphone amplifier output is single-ended and centered on
0V (VSS3). Therefore, the capacitor for AC-coupling can be removed. The minimum load resistance is 16 Ω. When the
input signal level is 0.7Vrms at single-ended mode, the output voltage is 0.69Vrms (= 30mW @ 16Ω) at HPG43-0 bits =
“19H” (0dB). The output level of headphone-amp can be controlled by HPGA4-0 bits. This volume setting is common to
L/R channels and can attenuate / gain the mixer output from +12dB to –50dB in 2dB step.
HPGA4-0 bits
GAIN (dB)
Step
1FH
+12
1EH
+10
:
-
1AH
+2
19H
0
18H
17H
−2
−4
2dB
16H
−6
:
:
2H
−46
1H
−48
0H
−50
Table 13. Headphone-Amp Volume Setting
(default)
Input
Input Volume
(-1.94dB @ Vol =0dB)
Mixing & Selector
(0dB)
HP Volume
(HPGA=0dB)
HP-Amp
(+1.94dB)
Figure 15. Headphone-Amp Path Level Diagram
MS0949-E-01
- 21 -
2008/07