AK4213 Datasheet, PDF (10/38 Pages) Asahi Kasei Microsystems – Mono Class-D SPK-Amp with Stereo Cap-less HP-Amp

[AK4213]
DC CHARACTERISTICS
(Ta= -40~85°C; AVDD=PVDD=2.6 ∼ 3.6V; SVDD=2.6 ∼ 5.5V; TVDD=1.6 ∼ 3.6V)
Parameter
Symbol
min
typ
High-Level Input Voltage (2.2V ≤ TVDD ≤ 3.6V) VIH 70%TVDD
-
(1.6V ≤ TVDD < 2.2V) VIH 80%TVDD
-
Low-Level Input Voltage (2.2V ≤ TVDD ≤ 3.6V) VIL
-
-
(1.6V ≤ TVDD < 2.2V) VIL
-
-
Low-Level Output Voltage
(2.0V ≤ TVDD ≤ 3.6V: Iout = 3mA) VOL
-
-
(1.6V ≤ TVDD < 2.0V: Iout = 3mA) VOL
-
-
Input Leakage Current
Iin
-
-
max
-
-
30%TVDD
20%TVDD
0.4
20%TVDD
±2
Units
V
V
V
V
V
V
μA
SWITCHING CHARACTERISTICS
(Ta= -40~85°C; AVDD=PVDD =2.6 ∼ 3.6V; SVDD=2.6 ∼ 5.5V; TVDD=1.6 ∼ 3.6V)
Parameter
Symbol
min
typ
max Units
Control Interface Timing: (Note 26)
SCL Clock Frequency
FSCL
-
-
400 kHz
Bus Free Time Between Transmissions
tBUF
1.3
-
-
μs
Start Condition Hold Time (prior to first clock pulse) tHD:STA
0.6
-
-
μs
Clock Low Time
tLOW
1.3
-
-
μs
Clock High Time
tHIGH
0.6
-
-
μs
Setup Time for Repeated Start Condition
tSU:STA
0.6
-
-
μs
SDA Hold Time from SCL Falling (Note 27)
tHD:DAT
0
-
μs
SDA Setup Time from SCL Rising
tSU:DAT
0.1
-
-
μs
Rise Time of Both SDA and SCL Lines
tR
-
-
0.3
μs
Fall Time of Both SDA and SCL Lines
tF
-
-
0.3
μs
Setup Time for Stop Condition
tSU:STO
0.6
-
-
μs
Capacitive load on bus
Cb
-
400
pF
Pulse Width of Spike Noise Suppressed by Input Filter
tSP
0
-
50
ns
Power-down & Reset Timing
PDN Pulse Width (Note 28)
tPD
150
-
-
ns
Note 26. I²C is a registered trademark of Philips Semiconductors.
Note 27. Data must be held long enough to bridge the 300ns-transition time of SCL.
Note 28. The PDN pin must change from “L” to “H” after all power supply pins are supplied. The AK4213 can be also
reset by bringing the PDN pin = “L” to “H”.
MS0949-E-01
- 10 -
2008/07