AK4213 Datasheet, PDF (30/38 Pages) Asahi Kasei Microsystems – Mono Class-D SPK-Amp with Stereo Cap-less HP-Amp

[AK4213]
■ Register Map
Addr
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
Register Name
Power Management 0
Power Management 1
Power Management 2
Mode Control 0
Lch Headphone Mixer
Rch Headphone Mixer
Speaker Mixer
Reserved
Input Volume #1
Input Volume #2
Input Volume #3
Reserved
Mode Control 1
Headphone PGA Control
Speaker PGA Control
ALC Mode Control 1
ALC Mode Control 2
ALC Mode Control 3
TEST
D7
0
0
0
THDET
0
0
0
0
R1V3
R2V3
R3V3
0
0
0
0
0
0
0
0
D6
PMMHR
0
0
0
0
0
0
0
R1V2
R2V2
R3V2
0
0
HPZ
0
0
0
ALC
0
D5
PMMHL
0
0
0
HPLR3
HPRR3
SPKR3
0
R1V1
R2V1
R3V1
0
MOFF
HPMTN
SPGA5
REF5
0
ZELMN
0
D4
PMHPR
0
0
BYPE
HPLL3
HPRL3
SPKL3
0
R1V0
R2V0
R3V0
0
0
HPGA4
SPGA4
REF4
ZTM1
LMAT1
0
D3
PMHPL
0
0
0
HPLR2
HPRR2
SPKR2
0
L1V3
L2V3
L3V3
0
PTS1
HPGA3
SPGA3
REF3
ZTM0
LMAT0
0
D2
PMCP
PMMSP
PMV3
SD3
HPLL2
HPRL2
SPKL2
0
L1V2
L2V2
L3V2
0
PTS0
HPGA2
SPGA2
REF2
WTM2
RGAIN1
0
D1
PMOSC
0
PMV2
SD2
HPLR1
HPRR1
SPKR1
0
L1V1
L2V1
L3V1
0
0
HPGA1
SPGA1
REF1
WMT1
RGAIN0
0
D0
PMVCM
PMSPK
PMV1
SD1
HPLL1
HPRL1
SPKL1
0
L1V0
L2V0
L3V0
0
0
HPGA0
SPGA0
REF0
WMT0
LMTH
0
All registers writing are inhibited at PDN pin = “L”.
The PDN pin = “L” resets the registers to their default value.
Note 29. The bit indicated as “0” in the register map must contain a “0” value.
Note 30. Only write to address 00H to 12H.
MS0949-E-01
- 30 -
2008/07