AK4564 Datasheet, PDF (30/48 Pages) Asahi Kasei Microsystems – 16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP

ASAHI KASEI
[AK4564]
n FADEOUT Mode
In FADEOUT mode, the present IVOL value decreases gradually down to the MUTE state when FDOUT bit changes
from “0” to “1”. The operation is done by the zero crossing detection. If the large signal is supplied to the ALC1 circuit
during the FADEOUT operation, the ALC1 limiter operation starts. However, the total time of the FADEOUT operation
is the same time, even if the limiter operation is done. The period of FADEOUT is set by FSTM and FDTM1-0 bits, the
number of step is set by FDATT1-0 bits. When FDOUT bit changes into “0” during the FADEOUT operation, the ALC1
operation starts from the present IVOL value. When FDOUT and ALC1 bits change into “0” at the same time, the
FADEOUT operation stops and the IVOL keeps the value at that time.
NOTE: When FDIN and FDOUT bits are set to “1” at the same time, FADEOUT operation is prior to FADEIN operation.
SDTO Output
ALC1 bit
FDOUT bit
(2)
(1)
(3)
(4) (5) (6) (7) (8)
Figure 24. Example for controlling sequence in FADEOUT operation
(1) WR (FDOUT = “1”): The FADEOUT operation starts. Then ALC1 bit should be always “1”.
(2) FADEOUT time is set by REF7-0, FDTM1-0 and FDATT bits.
e.g. REF7-0 = E1H(225 dec), FDTM1-0 = 40ms, FDATT1-0 = 2 step
(225 x FDTM1-0) / FDATT1-0 = 225 x 40ms / 2 = 4.5s
(3) The FADEOUT operation is completed. The IVOL value is the MUTE state. If FDOUT bit keeps “1”, the IVOL value
keeps the MUTE state.
(4) Analog and digital outputs are muted externally. Then the IVOL value is the MUTE state.
(5) WR (ALC1 = FDOUT = “0”): Exit the ALC1 and FADEOUT operations
(6) WR (IVOL = XXH): The IVOL value should be set to the same or smaller than REF’s.
(7) WR (ALC1 = “1”, FDOUT = “0”): The ALC1 operation restarts. But the ALC1 bit should be written until completing
zero crossing detection operation of IVOL.
(8) Release an external mute function for analog and digital outputs.
MS0140-E-01
- 30 -
2002/07