English
Language : 

AK4544A Datasheet, PDF (26/35 Pages) Asahi Kasei Microsystems – AC97 MULTIMEDIA AUDIO CODEC WITH SRC
[ASAHI KASEI]
[AK4544A]
nPower Management/Low Power Modes
The AK4544A is capable of operating at multiple reduced power modes for when no activity is required. The state of power down
is controlled by the Powerdown Register (26h). There are 8 separate commands for power down. See the table below for the
different modes. As the AK4544A operates at static mode, the registers will not lose their values even if the master clock is stopped
only upon power.
Powerdown Mode Truth Table
ADC
DAC
Mixer
VREF
ACLINK
PR0=”1”
PD
don’t care don’t care don’t care don’t care
PR1=”1” don’t care
PD
don’t care don’t care don’t care
PR2=”1” don’t care don’t care
PD
don’t care don’t care
(No DAC out)
PR3=”1”
PD
PD
PD
PD
don’t care
PR4=”1”
PD
PD
don’t care don’t care
PD
PR5=”1”
PD
PD
don’t care don’t care
PD
PR6=”1” don’t care don’t care don’t care don’t care don’t care
PR7=”1” don’t care don’t care don’t care don’t care don’t care
*: PD means Powerdown .
*: No DAC out means that there is no PCM out because mixer is disabled.
Internal
CLK
don’t care
don’t care
don’t care
LNLVL_OU
T
don’t care
don’t care
PD
don’t care
don’t care
PD
don’t care
don’t care
PD
don’t care
don’t care
PD
don’t care
EAPD
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
PD
From normal operation sequential writes to the Powerdown Register are performed to power down subsections of the AK4544A
one at a time. After everything has been shut off, a final write (of PR4) can be executed to shut down the AC ’97 digital interface
(AC-link). The part will remain in sleep mode with all its registers holding their static values. To wake up, the AC ‘97 controller will
send a pulse on the sync line issuing a warm reset. This will restart the AK4544A digital (resetting PR4 to zero). The AK4544A can
also be woken up with a cold reset. A cold reset will cause a loss of values of the registers as a cold reset will set them to their
default states. When a subsection is powered back on the Powerdown Control/Status register (index 26h) should be read to verify
that the section is ready (i.e. stable) before attempting any operation that requires its normal operation.
And the below figure illustrates one example of procedure to do a complete powerdown/power up of AK4544A.
PR0=1
PR1=1
PR2=1
PR4=1
Normal
ADCs off
PR0
DACs off
PR1
Analog
off
PR2 or
PR3
PR0=0
&
ADC=1
PR1=0
&
DAC=1
PR2=0
&
ANL=1
Digital I/F
off
PR4
Warm Reset
Shut off
AC-Link
Ready = 1
Default
Cold Reset
One example of AK4544A Powerdown/Powerup flow
When PR3 bit is set to “1”, ADC, DAC, Mixer, True Line Level Out, and VREF will be powered down even if any PRx
bit are “0”. When PR3 bit is reset to “0”, the AK4544A resumes with the previous state by referencing PRx bit. In this
case, the AK4544A outputs “0” (invalid) for corresponding slot-x valid bits in the slot 0 until the corresponding block
of the AK4544A is power-up.
Setting PR4 bit cause the Powerdown mode of AK4544A and AC-Link of AK4544A shut down. In this case, when
Warm Reset is executed, PR4 bit is cleared and the AC-Link is reactivated. Meanwhile Cold reset is selected,
AK4544A is restored to operation with default register settings.
In addition, setting PR5 bit causes the Powerdown mode of AK4544A and the internal clock of AK4544A to be
stopped. When a warm reset is done in this case, PR5 bit is cleared to 0 and internal clock and AC-Link are
reactivated. When Cold reset is executed, AK4544A is set up to the operation with default register setting, no
powerdown modes active.
The next figure illustrates a state when all the mixers should work with the static volume settings that are
contained in their associated registers. This is used when the user is playing a CD (or external LINE_IN source)
through the AC ‘97 codec to the speakers but has most of the system in a low power mode. The procedure for this
follows the previous except that the analog mixer is never shut down.
<MS0026-E-00>
- 26 -
2000/04