AK2400 Datasheet, PDF (22/52 Pages) Asahi Kasei Microsystems – High integrated receiver for PMR-LMR

[AK2400]
Address 0x01
Note) Writing into address 0x01 is enabled when writing into address 0x02 is performed.
NUM[17:0] : Set the numerator in 2’s complementary representation.
Address 0x02
CP1[2:0]: Sets the current value for the charge pump in normal operation (Charge Pump 1).
Charge Pump 1 current is determined by the following formula:
CP1_min = 0.57 / Resistance connected to the [BIAS] pin
Charge Pump 1 current = CP1_min × (CP1 setting + 1)
CP1[2:0]
000
001
010
011
100
101
110
111
Charge Pump 1 current [uA]
22kΩ
27 kΩ
33 kΩ
25.9
21.1
17.3
51.8
42.2
34.5
77.7
63.3
51.8
103.6
84.4
69.1
129.5
100.6
86.4
155.5
126.7
103.6
181.4
147.8
120.9
207.3
168.9
138.2
INT[14:0] : Sets the integer.
When {PRE[1:0]} =”00”, P = 4 is selected and then an integer from 48 to 8191 can be set.
When {PRE[1:0]} =”01”, P = 8 is selected and then an integer from 116 to 16383 can be set.
When {PRE[1:0]} =”10” or “11”, P = 16 is selected and then an integer from 348 to 32767 can be set.
Address 0x03
INTE : INTEGER mode
0 : Disable
1 : Enable (The delta-sigma circuit is integer mode operation.
Don’t use DFM operation.)
CPHIZ : Selects normal or TRI-STATE for the CP1/CP2 output.
0 : Charge pumps are activated. (Use this setting for normal operation.)
1 : TRI-STATE (The charge pump output is put in the high-impedance (Hi-Z) state.)
DITH : Selects dithering ON or OFF for a delta-sigma circuit.
0 : DITH OFF (Low Noise mode)
1 : DITH ON (Low Spurious mode)
When OFFSET register is used, set DITH=0(OFF).
LDCKSEL[1:0] : Sets phase error values for lock detect.
When DITH=”1” :
VCO frequency > [REFIN] pin input frequency / [LDCKSEL[1:0] setting + 1] × 7
When DITH=”0” :
VCO frequency > [REFIN] pin input frequency / [LDCKSEL[1:0] setting + 1] × 4
“00” : 1 cycle of the REFIN clock (This cannot be used for the reference dividing ratio ≤ 3.)
“01” : 2 cycle of the REFIN clock (This cannot be used for the reference dividing ratio ≤ 5.)
“10” : 3 cycle of the REFIN clock (This cannot be used for the reference dividing ratio ≤ 6.)
“11” : 1 cycle of the REFIN clock (This must be used for the reference dividing ratio = 3 )
014008989-E-01
22
2015/4