AK2400 Datasheet, PDF (2/52 Pages) Asahi Kasei Microsystems – High integrated receiver for PMR-LMR

Contents
[AK2400]
Overview·············································································································· 1
Applications ·········································································································· 1
Contents ·············································································································· 2
Block Diagram······································································································· 3
Function··············································································································· 4
Pin assignment ····································································································· 4
Pin/Function ········································································································· 5
Absolute Maximum Ratings ····················································································· 7
Recommended Operating Conditions ········································································ 7
Digital DC Characteristics························································································ 8
Digital AC Timing ··································································································· 9
ADC AC Timing ····································································································11
Power-up sequence ······························································································12
System Reset ······································································································12
Analog Characteristics (PLL SYNTH)········································································13
Analog Characteristics (1st MIXER)··········································································14
Analog Characteristics (2nd IF) ···············································································15
Register Map and Function Description ·····································································21
Block Diagram (PLL SYNTH) ··················································································30
Lock Detect function (PLL SYNTH) ··········································································31
Frequency Setting (PLL SYNTH) ·············································································34
Frequency switching adjustment (PLL SYNTH)···························································35
Charge Pump and Loop Filter (PLL SYNTHE) ····························································36
Fast lock-up mode (PLL SYNTH) ·············································································37
Calibration Procedure (Discriminator) ·······································································38
Typical Evaluation Board Schematic (PLL SYNTH) ·····················································39
Typical Evaluation Board Schematic (1st MIXER) ·······················································41
Typical Evaluation Board Schematic (2nd IF) ·····························································45
Package ·············································································································49
Revision History ···································································································50
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