AK2400 Datasheet, PDF (12/52 Pages) Asahi Kasei Microsystems – High integrated receiver for PMR-LMR

PDN (LDO)
On-chip LDO
(VREF1)
(1.8V operation)
RSTN
Write to the register
Power-up sequence
700s
System Reset can be done
[AK2400]
1.8V
The register can be written
Internal register values are set.
Figure 5 power-up sequence
Note) Power-up sequence assumes VDD ON.
After PDN is set to “High”, registers remain undefined. In order to initialize them, RSTN is
set to “High”
System Reset
Parameter
Symbol Conditions Min.
Hardware reset signal
input width
t_RSTN RSTN pin
1
Software reset
SRST
register
Typ.
Max.
Unit Remarks
s
Note 1)
Note 2)
Note1) After power-on, be sure to perform a hardware reset operation (register initialization). The system is
reset by a Low input of 1us (min.) and enters the normal operation state.
RSTN
Reset operation
tRSTN
V_IH
V_IL
Figure 6 System Reset
During the reset operation, SCLK, SDATAIN and CSN pin should be keep to Low or High.
Ex) SCLK:Low, SDATAIN:Low, CSN:High
Note2) When data 0x09:10101010 is written to the SRST[7:0] register, software reset is performed.
This setting initializes the registers and the operation mode is set to mode 2 (Standby 2).
After software reset is completed, this register comes to “0”.
014008989-E-01
12
2015/4