AKD4753-A Datasheet, PDF (2/60 Pages) Asahi Kasei Microsystems – AK4753 Evaluation Board Rev.2

[AKD4753-A]
Evaluation Board Manual
■ Operation sequence
1) Set up the power supply lines
Name of
jack
+5V
Color of
jack
Red
Used for
Regulator T2:
AVDD, DVDD of AK4753,
Digital Logic
AVDD Red AVDD of AK4753
DVDD Red DVDD of AK4753
D3.3V Red Digital Logic
AGND
DGND
Black Analog Ground
Black Digital Ground
Open / Connect
Should be always connected When default
setting.
Default
Setting
+5V
Should be always connected when AVDD of
AK4753 is not supplied from regulator T2.
In this case “JP13” is set to “Open”.
Should be always connected when DVDD of
AK4753 is not supplied from regulator T2.
In this case “JP14” is set to “Open”.
Should be always connected when Digital
Logic is not supplied from regulator T2.
In this case “JP15” is set to “Open.”
Should be always connected.
Should be always connected.
Open
Open
Open
GND
GND
Table 1. Set up the power supply lines
Each supply line should be distributed from the power supply unit.
2) Setup the evaluation mode, jumper pins
(2-1) External Slave Mode
(a) Evaluation of using DIR of AK4118A <default>
(b) All interface signals including master clock are fed externally
(2-2) External Master Mode
(a) Evaluation of using DIR of AK4118A
(2-3) PLL Slave Mode
(a) Evaluation of using DIR AK4118A
(b) All interface signals including master clock are fed externally
(2-4) PLL Master Mode
(a) All interface signals including master clock are fed externally
3) Power on
The AK4118A should be reset once bringing S1 (AK4118-PDN) “L” upon power-up.
The AK4753 should be reset once bringing S2 (AK4753-PDN) “L” upon power-up.
KM103902
-2-
2011/01