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AKD4121A_07 Datasheet, PDF (2/36 Pages) Asahi Kasei Microsystems – Asynchronous Sample Rate Converter
ASAHI KASEI
[AKD4121A]
Evaluation Board Manual Contents
„ Operating Sequence --------------------------------------------------------------------------------------- p. 3
1. Jumper Setting for Power Supply: JP10(REG)
2. Power Supply Line Setting
3. DIP switch and Jumper pin Setting
4. Power-on
„ DIP switch and Jumper pin Setting------------------------------------------------------------------ p. 4
1. Setting of fsi (input fs) block -------------------------------------------------------------------------- p. 4
1-1. In case of using optical Input.
1-2. All clock are fed through the 10-pin port.
1-3. SDTI is fed through the 10-pin port and others are fed from the DIR(AK4112B).
2. Setting of fso (output fs) block ---------------------------------------------------------------------- p. 9
2-1. In case of providing clock from DIT.
2-2. In case of providing clock from 10pin PORT
2-2-1. AK4121A Master Mode.
2-2-2. AK4121A Slave Mode.
3. Bypass Mode --------------------------------------------------------------------------------------------------- p.22
4. Setting of the others -------------------------------------------------------------------------------------- p.22
4-1. De-emphasis filter.
4-2. Soft Mute.
„ Jumper List --------------------------------------------------------------------------------------------------- p.21
„ DIP switch list --------------------------------------------------------------------------------------------------- p.21
„ Toggle switch list --------------------------------------------------------------------------------------------- p.22
„ LED ---------------------------------------------------------------------------------------------------------------- p.22
„ Measurement Results --------------------------------------------------------------------------------------- p.23
„ Important Notice --------------------------------------------------------------------------------------------- p.29
„ Circuit diagram
„ PCB layout
<KM088800>
-2-
2007/03