AKD4121A_07 Datasheet, PDF (10/36 Pages) Asahi Kasei Microsystems – Asynchronous Sample Rate Converter

ASAHI KASEI
[AKD4121A]
2-1-b. DIP SW setting
X2 or External Clock SW4-1
SW4-2
SW4-3
SW5-3
CMODE2 CMODE1 CMODE0 OCKS0
256fs
L
L
L
1/2 MCLK
512fs
L
H
L
MCLK
Table 7. Clock setting(Refer following figures)
12345
123
12345
123
CMODE
SW4
fso 1/2 MCLK
SW5
CMODE
SW4
fso 1/2 MCLK
SW5
256fso
512fso
Figure 9. DIP switch setting
<KM088800>
- 10 -
2007/03