AK4620A Datasheet, PDF (17/42 Pages) Asahi Kasei Microsystems – 24 BIT 192KHZ AUDIO CODEC WITH IPGA

ASAHI KASEI
[AK4620A]
OPERATION OVERVIEW
„ D/A Conversion Mode
In serial mode, the AK4620A can digitize either PCM data or DSD data. The P/D bit controls PCM/DSD mode. When
DSD mode, DSD data input occurs on DCLK, DSDL and DSDR pins. The ADC and IPGA are in power down mode. In
PCM mode, PCM data input occurs on BICK, SDTI and LRCK pins. When PCM/DSD mode changes (D/P bit), the
AK4620A should be reset by setting RSTAD and RSTDA bits to “0” or by grounding the PDN pin. It takes from 2/fs to
3/fs to change the mode. In parallel mode, AK4620A can only process PCM data.
D/P bit DAC mode ADC mode
0
PCM
PCM
1
DSD
Power down
Table 1. DSD/PCM Mode Control
„ System Clock Input
1. PCM Mode
AK4620A requires MCLK, BICK and LRCK external clocks. MCLK should be synchronized with LRCK but the phase
is not critical. External clocks (MCLK, BICK and LRCK) should always be present whenever the AK4620A is in normal
operation mode (PDN pin = “H” and either the ADC and DAC is in normal operation mode). If these clocks are not
provided, the AK4620A may draw excess current due to dynamic refresh of internal logic. If the external clocks are not
present, the AK4620A should be in the power-down mode (PDN pin = “L” or power down both the ADC and DAC by the
register). After exiting reset (PDN pin = “L” Æ “H”) at power-up etc., the AK4620A is in power-down mode until MCLK
and LRCK are provided.
As the AK4620A includes the phase detect circuit for LRCK, the AK4620A is reset automatically when the
synchronization is out of phase by changing the clock frequencies.
1-1. Serial mode (P/S pin= “L”)
As shown in Table 2, Table 3 and Table 4, select the MCLK frequency by setting CMODE, CKS0-1 and DFS0-1
(DFS0 bit and DFS0 pin are internally ORd). These registers are changed when RSTAD bit = RSTDA bit = “0”.
DFS1 bit
0
0
1
1
OR of DFS0 bit /
DFS0 pin
Mode
Sampling Rate
0
Normal speed
32kHz-54kHz
1
Double speed
54kHz-108kHz
0
Quad speed
108kHz-216kHz
1
N/A
-
Table 2. Sampling speed in serial mode
Default
MS0368-E-00
- 17 -
2004/12