AK4133VN Datasheet, PDF (12/28 Pages) Asahi Kasei Microsystems – 192kHz 24bit Sample Rate Converter

■ Timing Diagram
Master Clock
1/fCLK
OMCLK
tCLKH
tCLKL
[AK4133]
VIH
VIL
Input Port Clock
ILRCK
IBICK
Figure 3. OMCLK Clock Timing
1/FSI
tILRCH
tILRCL
tIBCK
tIBCKH
tIBCKL
VIH
VIL
dILRCK=tILRCH(or tILRCL)FSI100
VIH
VIL
Input Port Timing
Figure 4. ILRCK, IBICK Clock Timing
VIH
ILRCK
VIL
tIBLR
tILRB
IBICK
VIH
VIL
tISDS
tISDH
SDTI
VIH
VIL
Figure 5. Input PORT Audio Interface Timing (Slave Mode)
015015325-E-01
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2016/06