LU3X31T-T64 Datasheet, PDF (37/44 Pages) Agere Systems – LU3X31T-T64 Single-Port 3 10/100 Ethernet Transceiver TX

Preliminary Data Sheet
July 2000
Clock Timing (continued)
Table 37. Transmit Timing
Symbol
t1
t2
t3
t4
Description
TXEN Sampled to CRS High (100 Mbits/s)
TXEN Sampled to CRS High (10 Mbits/s)
TXEN Sampled to CRS Low (100 Mbits/s)
TXEN Sampled to CRS Low (10 Mbits/s)
Transmit Latency (100 Mbits/s)
Transmit Latency (10 Mbits/s)
Sampled TXEN Inactive to End of Frame
(100 Mbits/s)
Sampled TXEN Inactive to End of Frame
(10 Mbits/s)
LU3X31T-T64 Single-Port 3 V
10/100 Ethernet Transceiver TX
Min
Max
Unit
0
4
bits
—
1.5
bits
0
16
bits
—
16
bits
6
14
bits
4
—
bits
—
17
bits
—
5
bits
TXCLK
TXEN
CRS
TPTX
t1
t2
t3
t4
PREAMBLE
Figure 11. Transmit Timing
5-6789(F)
Lucent Technologies Inc.
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