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LU3X31T-T64 Datasheet, PDF (13/44 Pages) Agere Systems – LU3X31T-T64 Single-Port 3 10/100 Ethernet Transceiver TX
Preliminary Data Sheet
July 2000
LU3X31T-T64 Single-Port 3 V
10/100 Ethernet Transceiver TX
Functional Description (continued)
Assertion of the TXER input while the TXEN input is
also asserted will cause the LU3X31T-T64 to substitute
HALT code-groups for the 5B code derived from data
present at TXD[3:0]. However, the SSD (/J/K) and ESD
(/T/R) will not be substituted with HALT code-groups.
Hence, the assertion of TXER while TXEN is asserted
will result in a frame properly encapsulated with the /J/
K and /T/R delimiters which contains HALT code-
groups in place of the DATA code-groups.
The 100 Mbits/s symbol decoder translates all invalid
code groups into 0Eh by default. In case the ACCEPT
HALT register is set (bit 5 of register 18h), the HALT
code-group (00100) is translated into 05h instead.
Table 10. Symbol Code Scrambler
Symbol
Name
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
I
J
K
T
R
H
V
V
V
V
V
V
V
V
V
V
5B Code
[4:0]
11110
01001
10100
10101
01010
01011
01110
01111
10010
10011
10110
10111
11010
11011
11100
11101
11111
11000
10001
01101
00111
00100
00000
00001
00010
00011
00101
00110
01000
01100
10000
11001
4B Code
[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
undefined
0101
0101
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
Interpretation
DATA 0
DATA 1
DATA 2
DATA 3
DATA 4
DATA 5
DATA 6
DATA 7
DATA 8
DATA 9
DATA A
DATA B
DATA C
DATA D
DATA E
DATA F
IDLE: interstream fill code
First start-of-stream delimiter
Second start-of-stream delimiter
First end-of-stream delimiter
Second end-of-stream delimiter
HALT: transfer error
Invalid code
Invalid code
Invalid code
Invalid code
Invalid code
Invalid code
Invalid code
Invalid code
Invalid code
Invalid code
Lucent Technologies Inc.
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