LU6612 Datasheet, PDF (26/36 Pages) Agere Systems – LU6612 FASTCAT TM Single-FET for 10Base-T/100Base-TX

LU6612
FASTCAT Single-FET for 10Base-T/100Base-TX
Data Sheet
July 2000
Timing Characteristics (Preliminary) (continued)
Table 26. MII Data Timing (25 pF Load)
Name
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
Parameter
RXD[3:0], RX_ER, RX_DV, Valid to RX_CLK High
RX_CLK High to RXD[3:0], RX_DV, RX_ER Invalid
RX_CLK High
RX_CLK Low
RX_CLK Period
TX_CLK High
TX_CLK Low
TX_CLK Period
TXD[3:0], TX_EN, TX_ER, Setup to TX_CLK
TXD[3:0], TX_EN, TX_ER, Hold to TX_CLK
TXD[3:0], TX_EN, TX_ER Setup to LSCLK*
TXD[3:0], TX_EN, TX_ER, Hold to LSCLK*
First Bit of J on RX/RY While Transmitting Data to COL
Assert (half-duplex mode)
First Bit of T Received on RX/RY While Transmitting to COL
Deasserted (half-duplex mode)
* 100 Mbits/s only.
Min
10/100
10/100
14/180
14/180
—
14/180
14/180
—
15/140
0/0
10
0
—
—
Typ
Max Unit
—
—
ns
—
—
ns
—
26/220 ns
—
26/220 ns
40
—
ns
—
26/220 ns
—
26/220 ns
40
—
ns
—
—
ns
—
—
ns
—
—
ns
—
—
ns
—
170
ns
—
210
ns
26
Lucent Technologies Inc.