LU6612 Datasheet, PDF (17/36 Pages) Agere Systems – LU6612 FASTCAT TM Single-FET for 10Base-T/100Base-TX

Data Sheet
July 2000
LU6612
FASTCAT Single-FET for 10Base-T/100Base-TX
MII Station Management (continued)
Table 11. MR2, 3—PHY Identifier Registers (1 and 2) Bit Descriptions
Bit¹
2.15:0 (OUI[3:18])
3.15:10 (OUI[19:24])
3.9:4 (MODEL[5:0])
3.3:0 (VERSION[3:0])
Type²
R
R
R
R
Description
Organizationally Unique Identifier. The third through the 24th bits of the
OUI assigned to the PHY manufacturer by the IEEE are to be placed in bits
2.15:0 and 3.15:10. The value for bits 15:0 of register 2 is 0180h.
Organizationally Unique Identifier. The remaining 6 bits of the OUI. The
value for bits 15:10 of register 3 is 1Dh.
Model Number. 6-bit model number of the device. The model number is 12
decimal.
Revision Number. The value of the present revision number. The value is
0001b for the first version.
1. Note that the format for the pin descriptions is as follows: the first number is the register number, the second number is the bit position in the
register, and the name of the instantiated pad is in capital letters.
2. R = read.
Table 12. MR4—Autonegotiation Advertisement Register Bit Descriptions
Bit¹
4.15 (NEXT_PAGE)
4.14 (ACK)
4.13 (REM_FAULT)
4.12:10 (PAUSE)
4.9 (100BASET4)
4.8 (100BASET_FD)
4.7 (100BASETX)
4.6 (10BASET_FD)
4.5 (10BASET)
4.4:0 (SELECT)
Type²
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Next Page. The next page function is activated by setting this bit to a 1.
This will allow the exchange of arbitrary pieces of data. Data is carried by
optional next pages of information. (This function is not supported by
QS6611.)
Acknowledge. This bit is written to a logic zero and ignored on read.
Remote Fault. When set to 1, the LU6612 indicates to the link partner a
remote fault condition.
Pause. When set to 1, indicates that the LU6612 wishes to exchange flow
control information with its link partner.
100Base-T4. This bit should always be set to a 0.
100Base-TX Full Duplex. If written to 1, autonegotiation will advertise that
the LU6612 is capable of 100Base-TX full-duplex operation. This bit is set
high when MODE[2:0] is 111.
100Base-TX. If written to 1, autonegotiation will advertise that the LU6612
is capable of 100Base-TX operation.
10Base-T Full Duplex. If written to 1, autonegotiation will advertise that the
LU6612 is capable of 10Base-T full-duplex operation. This bit is set high
when MODE[2:0] is 111.
10Base-T. If written to 1, autonegotiation will advertise that the LU6612 is
capable of 10Base-T operation. This bit is set high when MODE[2:0] is 111.
Selector Field. Reset with the value 00001 for IEEE 802.3.
1. Note that the format for the pin descriptions is as follows: the first number is the register number, the second number is the bit position in the
register, and the name of the instantiated pad is in capital letters.
2. R = read, W = write.
Lucent Technologies Inc.
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