LU6612 Datasheet, PDF (11/36 Pages) Agere Systems – LU6612 FASTCAT TM Single-FET for 10Base-T/100Base-TX

Data Sheet
July 2000
LU6612
FASTCAT Single-FET for 10Base-T/100Base-TX
Pin Information (continued)
Table 4. Ground and Power Pins (21)
Signal
VCCIOA
GNDIOA
VCCIOB
GNDIOB
GNDIOC
VCCDIGA
GNDDIGA
VCCDIGB
GNDDIGB
VCCREC
GNDREC
VCCPLL
GNDPLL
VCCT
GNDT
VCCEQAP
GNDEQAP
VCCBG
GNDBG
VCCBT
GNDBT
Type
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
Pin
Description
6 Digital +5 V power supply for I/O
7 Digital ground for I/O
54 Digital +5 V power supply for I/O
53 Digital ground for I/O
41 Digital ground for I/O
35 Digital +5 V power supply for logic
36 Digital ground for logic
49 Digital +5 V power supply for logic
48 Digital ground for logic
60 Digital +5 V power supply for clock recovery circuit
59 Digital ground for clock recovery circuit
20 Analog +5 V power supply for 10 MHz and 100 MHz PLL clock synthesizer
23 Analog ground for 10 MHz and 100 MHz PLL clock synthesizer
11 Analog +5 V power supply for transmitter
10 Analog ground for transmitter
61 Analog +5 V power supply for equalizer and adaptation circuit
64 Analog ground for adaptation circuit.
1 Analog +5 V power supply for band-gap circuit
3 Analog ground band-gap circuit
14 Analog +5 V power supply for 10Base-T transmitter
13 Analog ground for 10Base-T transmitter
Table 5. Miscellaneous Pins (20)
Signal Type* Pin
Description
LSCLK1
I
LSCLK2
O
LINKLED/ I/O
PHYAD[0]
ACTLED/ I/O
PHYAD[1]
21 Local Symbol Clock. 25 MHz clock, ±100 ppm, 40%—60% duty cycle. This input is
connected to one terminal of a 25 MHz crystal or an external 25 MHz clock source.
22 Local Symbol Clock. 25 MHz crystal feedback. This output is connected to the
other terminal of a 25 MHz crystal or an external 25 MHz. If LSCLK1 is driven from
an external clock source, LSCLK2 is left unconnected.
4 Link LED. This pin indicates good link status. At powerup/reset, this pin is sampled
as input and to set the PHYAD[0] bit. If pulled high through a resistor, this pin will set
PHYAD[0] to a high or if pulled low through a resistor, will set PHYAD[0] to a zero.
When this pin is pulled high the LED output will be active-low, when pulled low the
LED output will be active-high.
5 Activity LED. This pin indicates transmit/receive activity. At powerup/reset, this pin
is sampled as input to set the PHYAD[1] bit. If pulled high through a resistor, this pin
will set PHYAD[1] to a high or if pulled low through a resistor, will set PHYAD[1] to a
zero. When this pin is pulled high the LED output will be active-low, when pulled low
the LED output will be active-high.
* ↑ indicates there is an internal pull-up; ↓ indicates there is an internal pull-down.
Lucent Technologies Inc.
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