LU6612 Datasheet, PDF (14/36 Pages) Agere Systems – LU6612 FASTCAT TM Single-FET for 10Base-T/100Base-TX

LU6612
FASTCAT Single-FET for 10Base-T/100Base-TX
Data Sheet
July 2000
MII Station Management (continued)
Register Overview
The MII management 16-bit register (MR) set is implemented as described in Table 8 below.
Table 8. MII Management Registers (MR)
Register
Address
0
1
2
3
4
5
5
6
7
8—27
28
29
30
Symbol
Name
MR0
MR1
MR2
MR3
MR4
MR5
MR5
MR6
MR7
MR8—MR27
MR28
MR29
MR30
Control Register
Status Register
PHY Identifier Register 1
PHY Identifier Register 2
Autonegotiation Advertisement Register
Autonegotiation Link Partner Ability Register (Base_Page)
Autonegotiation Link Partner Ability Register (Next_Page)
Autonegotiation Expansion Register
Next-Page Transmit Register
Reserved
Device Specific Register 1
Device Specific Register 2
Device Specific Register 3
Default
(Hex Code)
3000
7849
0180
7641
01E1
0000
—
0000
0000
0000
0000
1000
0000
14
Lucent Technologies Inc.