LU6612 Datasheet, PDF (22/36 Pages) Agere Systems – LU6612 FASTCAT TM Single-FET for 10Base-T/100Base-TX

LU6612
FASTCAT Single-FET for 10Base-T/100Base-TX
Data Sheet
July 2000
MII Station Management (continued)
Table 19. MR30—Device-Specific Register 3 (10 Mbits/s Control) Bit Descriptions
Bit¹
30.15:6 (R30[15:6])
30.5 (HBT_EN)
30.4 (ELL_EN)
30.3 (APF_EN)
30.2 (REF_SEL)
30.1 (SERIAL _SEL)
30.0 (ENA_NO_LP)
Type²
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Unused. Read as 0.
Heartbeat Enable. When this bit is a 1, the heartbeat function will be
enabled. Valid in 10 Mbits/s mode only. The default is 0.
Extended Line Length Enable. When this bit is a 1, the receive squelch lev-
els are reduced from a nominal 435 mV to 350 mV, allowing reception of sig-
nals with a lower amplitude. Valid in 10 Mbits/s mode only. The default is 0.
Autopolarity Function Enable. When this bit is a 1 and the LU6612 is in
10 Mbits/s mode, the autopolarity function will determine if the TP link is wired
with a polarity reversal. If there is a polarity reversal, the LU6612 will assert
the APS bit (register 28, bit 6) and correct the polarity reversal. If this bit is a 0
and the device is in 10 Mbits/s mode, the reversal will not be corrected. The
default is 0.
Reference Select. When this bit is a 1, the external 10 MHz reference of pin
REF10 is used for phase alignment. This bit defaults to a 0.
Serial Select. When this bit is set to a 1, 10 Mbits/s serial mode will be
selected. When the LU6612 is in 100 Mbits/s mode, this bit will be ignored.
The default is 0.
No Link Partner Mode. Setting this bit to a 1 will allow 10 Mbits/s operation
with link pulses disabled. If the LU6612 is configured for 100 Mbits/s opera-
tion, setting this bit will not affect operation. The default is 0.
1. Note that the format for the pin descriptions is as follows: the first number is the register number, the second number is the bit position in the
register, and the name of the instantiated pad is in capital letters.
2. R = read, W = write.
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